Lines Matching full:cache

7 #include <asm/cache.h>
23 # error "Invalid cache line size!"
27  * Most of this code is taken from 74xx_7xx/cache.S
32  * Invalidate L1 instruction cache.
43  * Invalidate L1 data cache.
53  * Flush data cache.
68  * Write any modified data cache blocks out to memory
69  * and invalidate the corresponding instruction cache blocks.
95  * Write any modified data cache blocks out to memory.
96  * Does not invalidate the corresponding cache lines (especially for
97  * any corresponding instruction cache).
103 	andc	r3,r3,r5	/* align r3 down to cache line */
104 	subf	r4,r3,r4	/* r4 = offset of stop from start of cache line */
106 	srwi.	r4,r4,LG_CACHE_LINE_SIZE  /* r4 = number of cache lines to flush */
118  * Flush a particular page from the data cache to RAM.
119  * Note: this is necessary because the instruction cache does *not*
120  * snoop from the data cache.
142  * Flush a particular page from the instruction cache.
143  * Note: this is necessary because the instruction cache does *not*
144  * snoop from the data cache.
160  * memory traffic (except to write out any cache lines which get
172  * Enable L1 Instruction cache
186  * Disable L1 Instruction cache
202  * Is instruction cache enabled?
223  * Enable data cache(s) - L1 and optionally L2
246  * Disable data cache(s) - L1 and optionally L2
269  * Is data cache enabled?
277  * Invalidate L2 cache using L2I, assume L2 is enabled
304  * Enable L2 cache
319  * Disable L2 cache