Lines Matching full:blob
29 extern void ft_qe_setup(void *blob);
30 extern void ft_fixup_num_cores(void *blob);
31 extern void ft_srio_setup(void *blob);
36 void ft_fixup_cpu(void *blob, u64 memory_limit) in ft_fixup_cpu() argument
49 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cpu()
51 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_cpu()
58 fdt_setprop_string(blob, off, "status", in ft_fixup_cpu()
61 fdt_setprop_string(blob, off, "status", in ft_fixup_cpu()
77 fdt_setprop(blob, off, "cpu-release-addr", in ft_fixup_cpu()
81 fdt_setprop_string(blob, off, "enable-method", in ft_fixup_cpu()
86 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_cpu()
102 off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE, in ft_fixup_cpu()
112 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096); in ft_fixup_cpu()
125 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096); in ft_fixup_cpu()
135 off = fdt_add_mem_rsv(blob, in ft_fixup_cpu()
143 off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START, in ft_fixup_cpu()
149 off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START, in ft_fixup_cpu()
160 static inline void ft_fixup_l3cache(void *blob, int off) in ft_fixup_l3cache() argument
171 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l3cache()
172 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l3cache()
173 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l3cache()
174 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l3cache()
175 fdt_setprop_cell(blob, off, "cache-level", 3); in ft_fixup_l3cache()
177 fdt_setprop_cell(blob, off, "cache-stash-id", 1); in ft_fixup_l3cache()
187 static inline void ft_fixup_l2cache_compatible(void *blob, int off) in ft_fixup_l2cache_compatible() argument
212 fdt_setprop(blob, off, "compatible", buf, len); in ft_fixup_l2cache_compatible()
250 static inline void ft_fixup_l2cache(void *blob) in ft_fixup_l2cache() argument
260 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
266 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
273 off = fdt_node_offset_by_phandle(blob, *ph); in ft_fixup_l2cache()
279 ft_fixup_l2cache_compatible(blob, off); in ft_fixup_l2cache()
280 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
281 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l2cache()
282 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l2cache()
283 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l2cache()
284 fdt_setprop_cell(blob, off, "cache-level", 2); in ft_fixup_l2cache()
290 static inline void ft_fixup_l2cache(void *blob) in ft_fixup_l2cache() argument
313 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
316 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
323 l2_off = fdt_node_offset_by_phandle(blob, *ph); in ft_fixup_l2cache()
331 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_l2cache()
335 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
340 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
346 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
347 fdt_setprop_cell(blob, l2_off, "cache-block-size", in ft_fixup_l2cache()
349 fdt_setprop_cell(blob, l2_off, "cache-size", size); in ft_fixup_l2cache()
350 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); in ft_fixup_l2cache()
351 fdt_setprop_cell(blob, l2_off, "cache-level", 2); in ft_fixup_l2cache()
352 ft_fixup_l2cache_compatible(blob, l2_off); in ft_fixup_l2cache()
356 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); in ft_fixup_l2cache()
365 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_l2cache()
369 l3_off = fdt_node_offset_by_phandle(blob, l3_off); in ft_fixup_l2cache()
374 ft_fixup_l3cache(blob, l3_off); in ft_fixup_l2cache()
381 static inline void ft_fixup_cache(void *blob) in ft_fixup_cache() argument
385 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cache()
399 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size); in ft_fixup_cache()
400 fdt_setprop_cell(blob, off, "d-cache-size", dsize); in ft_fixup_cache()
401 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets); in ft_fixup_cache()
405 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_cache()
407 fdt_setprop_cell(blob, off, "cache-stash-id", in ft_fixup_cache()
418 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size); in ft_fixup_cache()
419 fdt_setprop_cell(blob, off, "i-cache-size", isize); in ft_fixup_cache()
420 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets); in ft_fixup_cache()
422 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_cache()
426 ft_fixup_l2cache(blob); in ft_fixup_cache()
444 static void ft_fixup_clks(void *blob, const char *compat, u32 offset, in ft_fixup_clks() argument
448 int off = fdt_node_offset_by_compat_reg(blob, compat, phys); in ft_fixup_clks()
451 off = fdt_setprop_cell(blob, off, "clock-frequency", freq); in ft_fixup_clks()
459 static void ft_fixup_dpaa_clks(void *blob) in ft_fixup_dpaa_clks() argument
465 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET, in ft_fixup_dpaa_clks()
469 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET, in ft_fixup_dpaa_clks()
475 do_fixup_by_compat_u32(blob, "fsl,qman", in ft_fixup_dpaa_clks()
480 do_fixup_by_compat_u32(blob, "fsl,pme", in ft_fixup_dpaa_clks()
489 static void ft_fixup_qe_snum(void *blob) in ft_fixup_qe_snum() argument
496 do_fixup_by_compat_u32(blob, "fsl,qe", in ft_fixup_qe_snum()
499 do_fixup_by_compat_u32(blob, "fsl,qe", in ft_fixup_qe_snum()
528 void fdt_fixup_dma3(void *blob) argument
555 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
558 fdt_status_disabled(blob, nodeoff);
571 static void fdt_fixup_l2_switch(void *blob) argument
578 node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
590 fdt_setprop(blob, node, "local-mac-address", l2swaddr,
597 void ft_cpu_setup(void *blob, bd_t *bd) argument
606 fdt_fixup_crypto_node(blob, 0);
612 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
616 fdt_add_enet_stashing(blob);
621 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
624 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
627 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
629 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
631 fdt_setprop(blob, off, "clock-frequency", &val, 4);
632 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
635 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
639 ft_qe_setup(blob);
640 ft_fixup_qe_snum(blob);
644 fdt_fixup_fman_firmware(blob);
648 do_fixup_by_compat_u32(blob, "ns16550",
653 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
656 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
661 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
663 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
665 do_fixup_by_compat_u32(blob, "fsl,mpic",
668 do_fixup_by_compat_u32(blob, "fsl,mpic",
672 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
675 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
676 ft_fixup_num_cores(blob);
679 ft_fixup_cache(blob);
682 fdt_fixup_esdhc(blob, bd);
685 ft_fixup_dpaa_clks(blob);
688 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
691 fdt_fixup_bportals(blob);
695 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
699 fdt_fixup_qportals(blob);
703 ft_srio_setup(blob);
712 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
720 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
723 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
726 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
729 fdt_fixup_usb(blob);
731 fdt_fixup_l2_switch(blob);
733 fdt_fixup_dma3(blob);
845 void fdt_del_diu(void *blob) argument
849 while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
851 fdt_del_node(blob, nodeoff);