Lines Matching refs:select

16 	prompt "Target select"
21 	select ARCH_MPC8548
25 	select ARCH_MPC8544
29 	select ARCH_B4420
30 	select SUPPORT_SPL
31 	select PHYS_64BIT
36 	select ARCH_B4860
37 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
38 	select SUPPORT_SPL
39 	select PHYS_64BIT
40 	select FSL_DDR_INTERACTIVE if !SPL_BUILD
45 	select ARCH_BSC9131
46 	select SUPPORT_SPL
47 	select BOARD_EARLY_INIT_F
51 	select ARCH_BSC9132
52 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
53 	select SUPPORT_SPL
54 	select BOARD_EARLY_INIT_F
55 	select FSL_DDR_INTERACTIVE
59 	select ARCH_C29X
60 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
61 	select SUPPORT_SPL
62 	select SUPPORT_TPL
63 	select PHYS_64BIT
68 	select PHYS_64BIT
69 	select ARCH_P3041
70 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
76 	select PHYS_64BIT
77 	select ARCH_P4080
78 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
84 	select PHYS_64BIT
85 	select ARCH_P5020
86 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
92 	select PHYS_64BIT
93 	select ARCH_P5040
94 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
100 	select ARCH_MPC8536
102 	select SYS_FSL_DDRC_GEN3
108 	select ARCH_MPC8541
112 	select ARCH_MPC8544
117 	select ARCH_MPC8548
121 	select ARCH_MPC8555
125 	select ARCH_MPC8568
129 	select ARCH_MPC8569
133 	select ARCH_MPC8572
135 	select SYS_FSL_DDRC_GEN3
141 	select ARCH_P1010
142 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
143 	select SUPPORT_SPL
144 	select SUPPORT_TPL
151 	select ARCH_P1010
152 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
153 	select SUPPORT_SPL
154 	select SUPPORT_TPL
161 	select ARCH_P1022
162 	select SUPPORT_SPL
163 	select SUPPORT_TPL
169 	select ARCH_P1023
170 	select FSL_DDR_INTERACTIVE
176 	select SUPPORT_SPL
177 	select SUPPORT_TPL
178 	select ARCH_P1020
185 	select SUPPORT_SPL
186 	select SUPPORT_TPL
187 	select ARCH_P1020
194 	select SUPPORT_SPL
195 	select SUPPORT_TPL
196 	select ARCH_P1020
203 	select SUPPORT_SPL
204 	select SUPPORT_TPL
205 	select ARCH_P1020
212 	select SUPPORT_SPL
213 	select SUPPORT_TPL
214 	select ARCH_P1021
221 	select SUPPORT_SPL
222 	select SUPPORT_TPL
223 	select ARCH_P1024
230 	select SUPPORT_SPL
231 	select SUPPORT_TPL
232 	select ARCH_P1025
239 	select SUPPORT_SPL
240 	select SUPPORT_TPL
241 	select ARCH_P2020
248 	select ARCH_P1025
252 	select ARCH_P2041
253 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
254 	select PHYS_64BIT
260 	select ARCH_QEMU_E500
261 	select PHYS_64BIT
265 	select ARCH_T1024
266 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
267 	select SUPPORT_SPL
268 	select PHYS_64BIT
275 	select ARCH_T1023
276 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
277 	select SUPPORT_SPL
278 	select PHYS_64BIT
279 	select FSL_DDR_INTERACTIVE
285 	select ARCH_T1024
286 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
287 	select SUPPORT_SPL
288 	select PHYS_64BIT
289 	select FSL_DDR_INTERACTIVE
295 	select ARCH_T1040
296 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
297 	select PHYS_64BIT
298 	select FSL_DDR_INTERACTIVE
305 	select ARCH_T1040
306 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
307 	select SUPPORT_SPL
308 	select PHYS_64BIT
314 	select ARCH_T1040
315 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
316 	select SUPPORT_SPL
317 	select PHYS_64BIT
323 	select ARCH_T1042
324 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
325 	select SUPPORT_SPL
326 	select PHYS_64BIT
331 	select ARCH_T1042
332 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
333 	select SUPPORT_SPL
334 	select PHYS_64BIT
340 	select ARCH_T1042
341 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
342 	select SUPPORT_SPL
343 	select PHYS_64BIT
349 	select ARCH_T2080
350 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
351 	select SUPPORT_SPL
352 	select PHYS_64BIT
353 	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
354 	select FSL_DDR_INTERACTIVE
359 	select ARCH_T2080
360 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
361 	select SUPPORT_SPL
362 	select PHYS_64BIT
368 	select ARCH_T2081
369 	select SUPPORT_SPL
370 	select PHYS_64BIT
371 	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
372 	select FSL_DDR_INTERACTIVE
376 	select ARCH_T4160
377 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
378 	select SUPPORT_SPL
379 	select PHYS_64BIT
385 	select ARCH_T4160
386 	select SUPPORT_SPL
387 	select PHYS_64BIT
392 	select ARCH_T4240
393 	select BOARD_LATE_INIT if CHAIN_OF_TRUST
394 	select SUPPORT_SPL
395 	select PHYS_64BIT
396 	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
402 	select ARCH_T4240
403 	select SUPPORT_SPL
404 	select PHYS_64BIT
405 	select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
411 	select ARCH_P1022
415 	select ARCH_P2041
416 	select PHYS_64BIT
417 	select FSL_DDR_INTERACTIVE
423 	select ARCH_MPC8548
427 	select ARCH_MPC8572
429 	select SYS_FSL_DDRC_GEN3
433 	select ARCH_P2020
437 	select ARCH_P1020
443 	select ARCH_P5020
444 	select PHYS_64BIT
449 	select ARCH_P5040
450 	select PHYS_64BIT
457 	select E500MC
458 	select E6500
459 	select FSL_LAW
460 	select SYS_FSL_DDR_VER_47
461 	select SYS_FSL_ERRATUM_A004477
462 	select SYS_FSL_ERRATUM_A005871
463 	select SYS_FSL_ERRATUM_A006379
464 	select SYS_FSL_ERRATUM_A006384
465 	select SYS_FSL_ERRATUM_A006475
466 	select SYS_FSL_ERRATUM_A006593
467 	select SYS_FSL_ERRATUM_A007075
468 	select SYS_FSL_ERRATUM_A007186
469 	select SYS_FSL_ERRATUM_A007212
470 	select SYS_FSL_ERRATUM_A009942
471 	select SYS_FSL_HAS_DDR3
472 	select SYS_FSL_HAS_SEC
473 	select SYS_FSL_QORIQ_CHASSIS2
474 	select SYS_FSL_SEC_BE
475 	select SYS_FSL_SEC_COMPAT_4
476 	select SYS_PPC64
477 	select FSL_IFC
484 	select E500MC
485 	select E6500
486 	select FSL_LAW
487 	select SYS_FSL_DDR_VER_47
488 	select SYS_FSL_ERRATUM_A004477
489 	select SYS_FSL_ERRATUM_A005871
490 	select SYS_FSL_ERRATUM_A006379
491 	select SYS_FSL_ERRATUM_A006384
492 	select SYS_FSL_ERRATUM_A006475
493 	select SYS_FSL_ERRATUM_A006593
494 	select SYS_FSL_ERRATUM_A007075
495 	select SYS_FSL_ERRATUM_A007186
496 	select SYS_FSL_ERRATUM_A007212
497 	select SYS_FSL_ERRATUM_A007907
498 	select SYS_FSL_ERRATUM_A009942
499 	select SYS_FSL_HAS_DDR3
500 	select SYS_FSL_HAS_SEC
501 	select SYS_FSL_QORIQ_CHASSIS2
502 	select SYS_FSL_SEC_BE
503 	select SYS_FSL_SEC_COMPAT_4
504 	select SYS_PPC64
505 	select FSL_IFC
512 	select FSL_LAW
513 	select SYS_FSL_DDR_VER_44
514 	select SYS_FSL_ERRATUM_A004477
515 	select SYS_FSL_ERRATUM_A005125
516 	select SYS_FSL_ERRATUM_ESDHC111
517 	select SYS_FSL_HAS_DDR3
518 	select SYS_FSL_HAS_SEC
519 	select SYS_FSL_SEC_BE
520 	select SYS_FSL_SEC_COMPAT_4
521 	select FSL_IFC
528 	select FSL_LAW
529 	select SYS_FSL_DDR_VER_46
530 	select SYS_FSL_ERRATUM_A004477
531 	select SYS_FSL_ERRATUM_A005125
532 	select SYS_FSL_ERRATUM_A005434
533 	select SYS_FSL_ERRATUM_ESDHC111
534 	select SYS_FSL_ERRATUM_I2C_A004447
535 	select SYS_FSL_ERRATUM_IFC_A002769
536 	select SYS_FSL_HAS_DDR3
537 	select SYS_FSL_HAS_SEC
538 	select SYS_FSL_SEC_BE
539 	select SYS_FSL_SEC_COMPAT_4
540 	select SYS_PPC_E500_USE_DEBUG_TLB
541 	select FSL_IFC
550 	select FSL_LAW
551 	select SYS_FSL_DDR_VER_46
552 	select SYS_FSL_ERRATUM_A005125
553 	select SYS_FSL_ERRATUM_ESDHC111
554 	select SYS_FSL_HAS_DDR3
555 	select SYS_FSL_HAS_SEC
556 	select SYS_FSL_SEC_BE
557 	select SYS_FSL_SEC_COMPAT_6
558 	select SYS_PPC_E500_USE_DEBUG_TLB
559 	select FSL_IFC
566 	select FSL_LAW
567 	select SYS_FSL_ERRATUM_A004508
568 	select SYS_FSL_ERRATUM_A005125
569 	select SYS_FSL_HAS_DDR2
570 	select SYS_FSL_HAS_DDR3
571 	select SYS_FSL_HAS_SEC
572 	select SYS_FSL_SEC_BE
573 	select SYS_FSL_SEC_COMPAT_2
574 	select SYS_PPC_E500_USE_DEBUG_TLB
575 	select FSL_ELBC
582 	select FSL_LAW
583 	select SYS_FSL_HAS_DDR1
587 	select FSL_LAW
588 	select SYS_FSL_HAS_DDR1
589 	select SYS_FSL_HAS_SEC
590 	select SYS_FSL_SEC_BE
591 	select SYS_FSL_SEC_COMPAT_2
595 	select FSL_LAW
596 	select SYS_FSL_ERRATUM_A005125
597 	select SYS_FSL_HAS_DDR2
598 	select SYS_FSL_HAS_SEC
599 	select SYS_FSL_SEC_BE
600 	select SYS_FSL_SEC_COMPAT_2
601 	select SYS_PPC_E500_USE_DEBUG_TLB
602 	select FSL_ELBC
606 	select FSL_LAW
607 	select SYS_FSL_ERRATUM_A005125
608 	select SYS_FSL_ERRATUM_NMG_DDR120
609 	select SYS_FSL_ERRATUM_NMG_LBC103
610 	select SYS_FSL_ERRATUM_NMG_ETSEC129
611 	select SYS_FSL_ERRATUM_I2C_A004447
612 	select SYS_FSL_HAS_DDR2
613 	select SYS_FSL_HAS_DDR1
614 	select SYS_FSL_HAS_SEC
615 	select SYS_FSL_SEC_BE
616 	select SYS_FSL_SEC_COMPAT_2
617 	select SYS_PPC_E500_USE_DEBUG_TLB
622 	select FSL_LAW
623 	select SYS_FSL_HAS_DDR1
624 	select SYS_FSL_HAS_SEC
625 	select SYS_FSL_SEC_BE
626 	select SYS_FSL_SEC_COMPAT_2
630 	select FSL_LAW
631 	select SYS_FSL_HAS_DDR1
635 	select FSL_LAW
636 	select SYS_FSL_HAS_DDR2
637 	select SYS_FSL_HAS_SEC
638 	select SYS_FSL_SEC_BE
639 	select SYS_FSL_SEC_COMPAT_2
643 	select FSL_LAW
644 	select SYS_FSL_ERRATUM_A004508
645 	select SYS_FSL_ERRATUM_A005125
646 	select SYS_FSL_HAS_DDR3
647 	select SYS_FSL_HAS_SEC
648 	select SYS_FSL_SEC_BE
649 	select SYS_FSL_SEC_COMPAT_2
650 	select FSL_ELBC
655 	select FSL_LAW
656 	select SYS_FSL_ERRATUM_A004508
657 	select SYS_FSL_ERRATUM_A005125
658 	select SYS_FSL_ERRATUM_DDR_115
659 	select SYS_FSL_ERRATUM_DDR111_DDR134
660 	select SYS_FSL_HAS_DDR2
661 	select SYS_FSL_HAS_DDR3
662 	select SYS_FSL_HAS_SEC
663 	select SYS_FSL_SEC_BE
664 	select SYS_FSL_SEC_COMPAT_2
665 	select SYS_PPC_E500_USE_DEBUG_TLB
666 	select FSL_ELBC
671 	select FSL_LAW
672 	select SYS_FSL_ERRATUM_A004477
673 	select SYS_FSL_ERRATUM_A004508
674 	select SYS_FSL_ERRATUM_A005125
675 	select SYS_FSL_ERRATUM_A005275
676 	select SYS_FSL_ERRATUM_A006261
677 	select SYS_FSL_ERRATUM_A007075
678 	select SYS_FSL_ERRATUM_ESDHC111
679 	select SYS_FSL_ERRATUM_I2C_A004447
680 	select SYS_FSL_ERRATUM_IFC_A002769
681 	select SYS_FSL_ERRATUM_P1010_A003549
682 	select SYS_FSL_ERRATUM_SEC_A003571
683 	select SYS_FSL_ERRATUM_IFC_A003399
684 	select SYS_FSL_HAS_DDR3
685 	select SYS_FSL_HAS_SEC
686 	select SYS_FSL_SEC_BE
687 	select SYS_FSL_SEC_COMPAT_4
688 	select SYS_PPC_E500_USE_DEBUG_TLB
689 	select FSL_IFC
700 	select FSL_LAW
701 	select SYS_FSL_ERRATUM_A004508
702 	select SYS_FSL_ERRATUM_A005125
703 	select SYS_FSL_ERRATUM_ELBC_A001
704 	select SYS_FSL_ERRATUM_ESDHC111
705 	select SYS_FSL_HAS_DDR3
706 	select SYS_FSL_HAS_SEC
707 	select SYS_FSL_SEC_BE
708 	select SYS_FSL_SEC_COMPAT_2
709 	select SYS_PPC_E500_USE_DEBUG_TLB
710 	select FSL_ELBC
714 	select FSL_LAW
715 	select SYS_FSL_ERRATUM_A004508
716 	select SYS_FSL_ERRATUM_A005125
717 	select SYS_FSL_ERRATUM_ELBC_A001
718 	select SYS_FSL_ERRATUM_ESDHC111
719 	select SYS_FSL_HAS_DDR3
720 	select SYS_FSL_HAS_SEC
721 	select SYS_FSL_SEC_BE
722 	select SYS_FSL_SEC_COMPAT_2
723 	select SYS_PPC_E500_USE_DEBUG_TLB
724 	select FSL_ELBC
733 	select FSL_LAW
734 	select SYS_FSL_ERRATUM_A004508
735 	select SYS_FSL_ERRATUM_A005125
736 	select SYS_FSL_ERRATUM_ELBC_A001
737 	select SYS_FSL_ERRATUM_ESDHC111
738 	select SYS_FSL_HAS_DDR3
739 	select SYS_FSL_HAS_SEC
740 	select SYS_FSL_SEC_BE
741 	select SYS_FSL_SEC_COMPAT_2
742 	select SYS_PPC_E500_USE_DEBUG_TLB
743 	select FSL_ELBC
752 	select FSL_LAW
753 	select SYS_FSL_ERRATUM_A004477
754 	select SYS_FSL_ERRATUM_A004508
755 	select SYS_FSL_ERRATUM_A005125
756 	select SYS_FSL_ERRATUM_ELBC_A001
757 	select SYS_FSL_ERRATUM_ESDHC111
758 	select SYS_FSL_ERRATUM_SATA_A001
759 	select SYS_FSL_HAS_DDR3
760 	select SYS_FSL_HAS_SEC
761 	select SYS_FSL_SEC_BE
762 	select SYS_FSL_SEC_COMPAT_2
763 	select SYS_PPC_E500_USE_DEBUG_TLB
764 	select FSL_ELBC
768 	select FSL_LAW
769 	select SYS_FSL_ERRATUM_A004508
770 	select SYS_FSL_ERRATUM_A005125
771 	select SYS_FSL_ERRATUM_I2C_A004447
772 	select SYS_FSL_HAS_DDR3
773 	select SYS_FSL_HAS_SEC
774 	select SYS_FSL_SEC_BE
775 	select SYS_FSL_SEC_COMPAT_4
776 	select FSL_ELBC
780 	select FSL_LAW
781 	select SYS_FSL_ERRATUM_A004508
782 	select SYS_FSL_ERRATUM_A005125
783 	select SYS_FSL_ERRATUM_ELBC_A001
784 	select SYS_FSL_ERRATUM_ESDHC111
785 	select SYS_FSL_HAS_DDR3
786 	select SYS_FSL_HAS_SEC
787 	select SYS_FSL_SEC_BE
788 	select SYS_FSL_SEC_COMPAT_2
789 	select SYS_PPC_E500_USE_DEBUG_TLB
790 	select FSL_ELBC
800 	select FSL_LAW
801 	select SYS_FSL_ERRATUM_A004508
802 	select SYS_FSL_ERRATUM_A005125
803 	select SYS_FSL_ERRATUM_ELBC_A001
804 	select SYS_FSL_ERRATUM_ESDHC111
805 	select SYS_FSL_HAS_DDR3
806 	select SYS_FSL_HAS_SEC
807 	select SYS_FSL_SEC_BE
808 	select SYS_FSL_SEC_COMPAT_2
809 	select SYS_PPC_E500_USE_DEBUG_TLB
810 	select FSL_ELBC
816 	select FSL_LAW
817 	select SYS_FSL_ERRATUM_A004477
818 	select SYS_FSL_ERRATUM_A004508
819 	select SYS_FSL_ERRATUM_A005125
820 	select SYS_FSL_ERRATUM_ESDHC111
821 	select SYS_FSL_ERRATUM_ESDHC_A001
822 	select SYS_FSL_HAS_DDR3
823 	select SYS_FSL_HAS_SEC
824 	select SYS_FSL_SEC_BE
825 	select SYS_FSL_SEC_COMPAT_2
826 	select SYS_PPC_E500_USE_DEBUG_TLB
827 	select FSL_ELBC
834 	select E500MC
835 	select FSL_LAW
836 	select SYS_FSL_ERRATUM_A004510
837 	select SYS_FSL_ERRATUM_A004849
838 	select SYS_FSL_ERRATUM_A005275
839 	select SYS_FSL_ERRATUM_A006261
840 	select SYS_FSL_ERRATUM_CPU_A003999
841 	select SYS_FSL_ERRATUM_DDR_A003
842 	select SYS_FSL_ERRATUM_DDR_A003474
843 	select SYS_FSL_ERRATUM_ESDHC111
844 	select SYS_FSL_ERRATUM_I2C_A004447
845 	select SYS_FSL_ERRATUM_NMG_CPU_A011
846 	select SYS_FSL_ERRATUM_SRIO_A004034
847 	select SYS_FSL_ERRATUM_USB14
848 	select SYS_FSL_HAS_DDR3
849 	select SYS_FSL_HAS_SEC
850 	select SYS_FSL_QORIQ_CHASSIS1
851 	select SYS_FSL_SEC_BE
852 	select SYS_FSL_SEC_COMPAT_4
853 	select FSL_ELBC
858 	select E500MC
859 	select FSL_LAW
860 	select SYS_FSL_DDR_VER_44
861 	select SYS_FSL_ERRATUM_A004510
862 	select SYS_FSL_ERRATUM_A004849
863 	select SYS_FSL_ERRATUM_A005275
864 	select SYS_FSL_ERRATUM_A005812
865 	select SYS_FSL_ERRATUM_A006261
866 	select SYS_FSL_ERRATUM_CPU_A003999
867 	select SYS_FSL_ERRATUM_DDR_A003
868 	select SYS_FSL_ERRATUM_DDR_A003474
869 	select SYS_FSL_ERRATUM_ESDHC111
870 	select SYS_FSL_ERRATUM_I2C_A004447
871 	select SYS_FSL_ERRATUM_NMG_CPU_A011
872 	select SYS_FSL_ERRATUM_SRIO_A004034
873 	select SYS_FSL_ERRATUM_USB14
874 	select SYS_FSL_HAS_DDR3
875 	select SYS_FSL_HAS_SEC
876 	select SYS_FSL_QORIQ_CHASSIS1
877 	select SYS_FSL_SEC_BE
878 	select SYS_FSL_SEC_COMPAT_4
879 	select FSL_ELBC
887 	select E500MC
888 	select FSL_LAW
889 	select SYS_FSL_DDR_VER_44
890 	select SYS_FSL_ERRATUM_A004510
891 	select SYS_FSL_ERRATUM_A004580
892 	select SYS_FSL_ERRATUM_A004849
893 	select SYS_FSL_ERRATUM_A005812
894 	select SYS_FSL_ERRATUM_A007075
895 	select SYS_FSL_ERRATUM_CPC_A002
896 	select SYS_FSL_ERRATUM_CPC_A003
897 	select SYS_FSL_ERRATUM_CPU_A003999
898 	select SYS_FSL_ERRATUM_DDR_A003
899 	select SYS_FSL_ERRATUM_DDR_A003474
900 	select SYS_FSL_ERRATUM_ELBC_A001
901 	select SYS_FSL_ERRATUM_ESDHC111
902 	select SYS_FSL_ERRATUM_ESDHC13
903 	select SYS_FSL_ERRATUM_ESDHC135
904 	select SYS_FSL_ERRATUM_I2C_A004447
905 	select SYS_FSL_ERRATUM_NMG_CPU_A011
906 	select SYS_FSL_ERRATUM_SRIO_A004034
907 	select SYS_P4080_ERRATUM_CPU22
908 	select SYS_P4080_ERRATUM_PCIE_A003
909 	select SYS_P4080_ERRATUM_SERDES8
910 	select SYS_P4080_ERRATUM_SERDES9
911 	select SYS_P4080_ERRATUM_SERDES_A001
912 	select SYS_P4080_ERRATUM_SERDES_A005
913 	select SYS_FSL_HAS_DDR3
914 	select SYS_FSL_HAS_SEC
915 	select SYS_FSL_QORIQ_CHASSIS1
916 	select SYS_FSL_SEC_BE
917 	select SYS_FSL_SEC_COMPAT_4
918 	select FSL_ELBC
925 	select E500MC
926 	select FSL_LAW
927 	select SYS_FSL_DDR_VER_44
928 	select SYS_FSL_ERRATUM_A004510
929 	select SYS_FSL_ERRATUM_A005275
930 	select SYS_FSL_ERRATUM_A006261
931 	select SYS_FSL_ERRATUM_DDR_A003
932 	select SYS_FSL_ERRATUM_DDR_A003474
933 	select SYS_FSL_ERRATUM_ESDHC111
934 	select SYS_FSL_ERRATUM_I2C_A004447
935 	select SYS_FSL_ERRATUM_SRIO_A004034
936 	select SYS_FSL_ERRATUM_USB14
937 	select SYS_FSL_HAS_DDR3
938 	select SYS_FSL_HAS_SEC
939 	select SYS_FSL_QORIQ_CHASSIS1
940 	select SYS_FSL_SEC_BE
941 	select SYS_FSL_SEC_COMPAT_4
942 	select SYS_PPC64
943 	select FSL_ELBC
950 	select E500MC
951 	select FSL_LAW
952 	select SYS_FSL_DDR_VER_44
953 	select SYS_FSL_ERRATUM_A004510
954 	select SYS_FSL_ERRATUM_A004699
955 	select SYS_FSL_ERRATUM_A005275
956 	select SYS_FSL_ERRATUM_A005812
957 	select SYS_FSL_ERRATUM_A006261
958 	select SYS_FSL_ERRATUM_DDR_A003
959 	select SYS_FSL_ERRATUM_DDR_A003474
960 	select SYS_FSL_ERRATUM_ESDHC111
961 	select SYS_FSL_ERRATUM_USB14
962 	select SYS_FSL_HAS_DDR3
963 	select SYS_FSL_HAS_SEC
964 	select SYS_FSL_QORIQ_CHASSIS1
965 	select SYS_FSL_SEC_BE
966 	select SYS_FSL_SEC_COMPAT_4
967 	select SYS_PPC64
968 	select FSL_ELBC
978 	select E500MC
979 	select FSL_LAW
980 	select SYS_FSL_DDR_VER_50
981 	select SYS_FSL_ERRATUM_A008378
982 	select SYS_FSL_ERRATUM_A009663
983 	select SYS_FSL_ERRATUM_A009942
984 	select SYS_FSL_ERRATUM_ESDHC111
985 	select SYS_FSL_HAS_DDR3
986 	select SYS_FSL_HAS_DDR4
987 	select SYS_FSL_HAS_SEC
988 	select SYS_FSL_QORIQ_CHASSIS2
989 	select SYS_FSL_SEC_BE
990 	select SYS_FSL_SEC_COMPAT_5
991 	select FSL_IFC
998 	select E500MC
999 	select FSL_LAW
1000 	select SYS_FSL_DDR_VER_50
1001 	select SYS_FSL_ERRATUM_A008378
1002 	select SYS_FSL_ERRATUM_A009663
1003 	select SYS_FSL_ERRATUM_A009942
1004 	select SYS_FSL_ERRATUM_ESDHC111
1005 	select SYS_FSL_HAS_DDR3
1006 	select SYS_FSL_HAS_DDR4
1007 	select SYS_FSL_HAS_SEC
1008 	select SYS_FSL_QORIQ_CHASSIS2
1009 	select SYS_FSL_SEC_BE
1010 	select SYS_FSL_SEC_COMPAT_5
1011 	select FSL_IFC
1019 	select E500MC
1020 	select FSL_LAW
1021 	select SYS_FSL_DDR_VER_50
1022 	select SYS_FSL_ERRATUM_A008044
1023 	select SYS_FSL_ERRATUM_A008378
1024 	select SYS_FSL_ERRATUM_A009663
1025 	select SYS_FSL_ERRATUM_A009942
1026 	select SYS_FSL_ERRATUM_ESDHC111
1027 	select SYS_FSL_HAS_DDR3
1028 	select SYS_FSL_HAS_DDR4
1029 	select SYS_FSL_HAS_SEC
1030 	select SYS_FSL_QORIQ_CHASSIS2
1031 	select SYS_FSL_SEC_BE
1032 	select SYS_FSL_SEC_COMPAT_5
1033 	select FSL_IFC
1042 	select E500MC
1043 	select FSL_LAW
1044 	select SYS_FSL_DDR_VER_50
1045 	select SYS_FSL_ERRATUM_A008044
1046 	select SYS_FSL_ERRATUM_A008378
1047 	select SYS_FSL_ERRATUM_A009663
1048 	select SYS_FSL_ERRATUM_A009942
1049 	select SYS_FSL_ERRATUM_ESDHC111
1050 	select SYS_FSL_HAS_DDR3
1051 	select SYS_FSL_HAS_DDR4
1052 	select SYS_FSL_HAS_SEC
1053 	select SYS_FSL_QORIQ_CHASSIS2
1054 	select SYS_FSL_SEC_BE
1055 	select SYS_FSL_SEC_COMPAT_5
1056 	select FSL_IFC
1065 	select E500MC
1066 	select E6500
1067 	select FSL_LAW
1068 	select SYS_FSL_DDR_VER_47
1069 	select SYS_FSL_ERRATUM_A006379
1070 	select SYS_FSL_ERRATUM_A006593
1071 	select SYS_FSL_ERRATUM_A007186
1072 	select SYS_FSL_ERRATUM_A007212
1073 	select SYS_FSL_ERRATUM_A007815
1074 	select SYS_FSL_ERRATUM_A007907
1075 	select SYS_FSL_ERRATUM_A009942
1076 	select SYS_FSL_ERRATUM_ESDHC111
1077 	select SYS_FSL_HAS_DDR3
1078 	select SYS_FSL_HAS_SEC
1079 	select SYS_FSL_QORIQ_CHASSIS2
1080 	select SYS_FSL_SEC_BE
1081 	select SYS_FSL_SEC_COMPAT_4
1082 	select SYS_PPC64
1083 	select FSL_IFC
1091 	select E500MC
1092 	select E6500
1093 	select FSL_LAW
1094 	select SYS_FSL_DDR_VER_47
1095 	select SYS_FSL_ERRATUM_A006379
1096 	select SYS_FSL_ERRATUM_A006593
1097 	select SYS_FSL_ERRATUM_A007186
1098 	select SYS_FSL_ERRATUM_A007212
1099 	select SYS_FSL_ERRATUM_A009942
1100 	select SYS_FSL_ERRATUM_ESDHC111
1101 	select SYS_FSL_HAS_DDR3
1102 	select SYS_FSL_HAS_SEC
1103 	select SYS_FSL_QORIQ_CHASSIS2
1104 	select SYS_FSL_SEC_BE
1105 	select SYS_FSL_SEC_COMPAT_4
1106 	select SYS_PPC64
1107 	select FSL_IFC
1113 	select E500MC
1114 	select E6500
1115 	select FSL_LAW
1116 	select SYS_FSL_DDR_VER_47
1117 	select SYS_FSL_ERRATUM_A004468
1118 	select SYS_FSL_ERRATUM_A005871
1119 	select SYS_FSL_ERRATUM_A006379
1120 	select SYS_FSL_ERRATUM_A006593
1121 	select SYS_FSL_ERRATUM_A007186
1122 	select SYS_FSL_ERRATUM_A007798
1123 	select SYS_FSL_ERRATUM_A009942
1124 	select SYS_FSL_HAS_DDR3
1125 	select SYS_FSL_HAS_SEC
1126 	select SYS_FSL_QORIQ_CHASSIS2
1127 	select SYS_FSL_SEC_BE
1128 	select SYS_FSL_SEC_COMPAT_4
1129 	select SYS_PPC64
1130 	select FSL_IFC
1138 	select E500MC
1139 	select E6500
1140 	select FSL_LAW
1141 	select SYS_FSL_DDR_VER_47
1142 	select SYS_FSL_ERRATUM_A004468
1143 	select SYS_FSL_ERRATUM_A005871
1144 	select SYS_FSL_ERRATUM_A006261
1145 	select SYS_FSL_ERRATUM_A006379
1146 	select SYS_FSL_ERRATUM_A006593
1147 	select SYS_FSL_ERRATUM_A007186
1148 	select SYS_FSL_ERRATUM_A007798
1149 	select SYS_FSL_ERRATUM_A007815
1150 	select SYS_FSL_ERRATUM_A007907
1151 	select SYS_FSL_ERRATUM_A009942
1152 	select SYS_FSL_HAS_DDR3
1153 	select SYS_FSL_HAS_SEC
1154 	select SYS_FSL_QORIQ_CHASSIS2
1155 	select SYS_FSL_SEC_BE
1156 	select SYS_FSL_SEC_COMPAT_4
1157 	select SYS_PPC64
1158 	select FSL_IFC