Lines Matching +full:sync +full:- +full:read
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
18 struct ccsr_ddr __iomem *ddr = &immap->ddr; in ecc_print_status()
20 ddr83xx_t *ddr = &immap->ddr; in ecc_print_status()
24 (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF"); in ecc_print_status()
28 printf(" Multiple-Bit Error Interrupt Enable: %d\n", in ecc_print_status()
29 (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0); in ecc_print_status()
30 printf(" Single-Bit Error Interrupt Enable: %d\n", in ecc_print_status()
31 (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0); in ecc_print_status()
33 (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0); in ecc_print_status()
37 printf(" Multiple-Bit Error Disable: %d\n", in ecc_print_status()
38 (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0); in ecc_print_status()
39 printf(" Single-Bit Error Disable: %d\n", in ecc_print_status()
40 (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0); in ecc_print_status()
42 (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0); in ecc_print_status()
46 ddr->data_err_inject_hi, ddr->data_err_inject_lo); in ecc_print_status()
50 (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0); in ecc_print_status()
52 (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0); in ecc_print_status()
54 ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM); in ecc_print_status()
57 printf("Memory Single-Bit Error Management (0..255):\n"); in ecc_print_status()
58 printf(" Single-Bit Error Threshold: %d\n", in ecc_print_status()
59 (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT); in ecc_print_status()
60 printf(" Single-Bit Error Counter: %d\n\n", in ecc_print_status()
61 (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT); in ecc_print_status()
66 (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0); in ecc_print_status()
67 printf(" Multiple-Bit Error: %d\n", in ecc_print_status()
68 (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0); in ecc_print_status()
69 printf(" Single-Bit Error: %d\n", in ecc_print_status()
70 (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0); in ecc_print_status()
72 (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0); in ecc_print_status()
75 printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address); in ecc_print_status()
76 printf("Memory Data Path Read Capture High/Low: %08x %08x\n", in ecc_print_status()
77 ddr->capture_data_hi, ddr->capture_data_lo); in ecc_print_status()
78 printf("Memory Data Path Read Capture ECC: 0x%02x\n\n", in ecc_print_status()
79 ddr->capture_ecc & CAPTURE_ECC_ECE); in ecc_print_status()
83 (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> in ecc_print_status()
86 (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> in ecc_print_status()
89 (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> in ecc_print_status()
92 (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> in ecc_print_status()
95 ddr->capture_attributes & ECC_CAPT_ATTR_VLD); in ecc_print_status()
102 struct ccsr_ddr __iomem *ddr = &immap->ddr; in do_ecc()
104 ddr83xx_t *ddr = &immap->ddr; in do_ecc()
118 /* After injecting error, re-initialize the memory with the value */ in do_ecc()
130 ddr->capture_address = 0; in do_ecc()
131 ddr->capture_data_hi = 0; in do_ecc()
132 ddr->capture_data_lo = 0; in do_ecc()
133 ddr->capture_ecc = 0; in do_ecc()
134 ddr->capture_attributes = 0; in do_ecc()
148 val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET); in do_ecc()
150 ddr->err_sbe = val; in do_ecc()
161 val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC); in do_ecc()
163 ddr->err_sbe = val; in do_ecc()
166 val = ddr->err_disable; in do_ecc()
178 } else if (strcmp(argv[2], "-sbe") == 0) { in do_ecc()
180 } else if (strcmp(argv[2], "-mbe") == 0) { in do_ecc()
182 } else if (strcmp(argv[2], "-mse") == 0) { in do_ecc()
184 } else if (strcmp(argv[2], "-all") == 0) { in do_ecc()
193 ddr->err_disable = val; in do_ecc()
194 __asm__ __volatile__("sync"); in do_ecc()
198 val = ddr->err_detect; in do_ecc()
218 ddr->err_detect = val; in do_ecc()
223 ddr->data_err_inject_hi = val; in do_ecc()
228 ddr->data_err_inject_lo = val; in do_ecc()
237 val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM); in do_ecc()
239 ddr->ecc_err_inject = val; in do_ecc()
242 val = ddr->ecc_err_inject; in do_ecc()
251 ddr->ecc_err_inject = val; in do_ecc()
252 __asm__ __volatile__("sync"); in do_ecc()
256 val = ddr->ecc_err_inject; in do_ecc()
265 ddr->ecc_err_inject = val; in do_ecc()
284 ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; in do_ecc()
285 __asm__ __volatile__("sync"); in do_ecc()
290 __asm__ __volatile__("sync"); in do_ecc()
293 ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; in do_ecc()
294 __asm__ __volatile__("sync"); in do_ecc()
297 /* read data, this generates ECC error */ in do_ecc()
299 __asm__ __volatile__("sync"); in do_ecc()
301 /* re-initialize memory, double word write the location again, in do_ecc()
304 __asm__ __volatile__("sync"); in do_ecc()
323 ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN; in do_ecc()
324 __asm__ __volatile__("sync"); in do_ecc()
329 __asm__ __volatile__("sync"); in do_ecc()
332 * bus will read-modify-write, in do_ecc()
335 __asm__ __volatile__("sync"); in do_ecc()
338 ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN; in do_ecc()
339 __asm__ __volatile__("sync"); in do_ecc()
342 /* re-initialize memory, in do_ecc()
346 __asm__ __volatile__("sync"); in do_ecc()
357 "status - print out status info\n"
358 "ecc captureclear - clear capture regs data\n"
359 "ecc sbecnt <val> - set Single-Bit Error counter\n"
360 "ecc sbethr <val> - set Single-Bit Threshold\n"
361 "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n"
362 " [-|+]sbe - Single-Bit Error\n"
363 " [-|+]mbe - Multiple-Bit Error\n"
364 " [-|+]mse - Memory Select Error\n"
365 " [-|+]all - all errors\n"
366 "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"
367 " mme - Multiple Memory Errors\n"
368 " sbe - Single-Bit Error\n"
369 " mbe - Multiple-Bit Error\n"
370 " mse - Memory Select Error\n"
371 " all - all errors\n"
372 "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n"
373 "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n"
374 "ecc injectecc <ecc> - set ECC Error Injection Mask\n"
375 "ecc inject <en|dis> - enable/disable error injection\n"
376 "ecc mirror <en|dis> - enable/disable mirror byte\n"
377 "ecc testdw <addr> <cnt> - test mem region with double word access:\n"
378 " - enables injects\n"
379 " - writes pattern injecting errors with double word access\n"
380 " - disables injects\n"
381 " - reads pattern back with double word access, generates error\n"
382 " - re-inits memory\n"
383 "ecc testword <addr> <cnt> - test mem region with word access:\n"
384 " - enables injects\n"
385 " - writes pattern injecting errors with word access\n"
386 " - writes pattern with word access, generates error\n"
387 " - disables injects\n" " - re-inits memory");