Lines Matching +full:0 +full:x00000020
18 #size-cells = <0>;
20 cpu: cpu@0x0 {
23 reg = <0x00000000>;
38 altr,reset-addr = <0xc2800000>;
39 altr,fast-tlb-miss-addr = <0xc7fff400>;
40 altr,exception-addr = <0xd0000020>;
46 memory@0 {
48 reg = <0x10000000 0x08000000>,
49 <0x07fff400 0x00000400>;
52 sopc@0 {
60 pb_cpu_to_io: bridge@0x8000000 {
62 reg = <0x08000000 0x00800000>;
65 ranges = <0x00002000 0x08002000 0x00002000>,
66 <0x00004000 0x08004000 0x00000400>,
67 <0x00004400 0x08004400 0x00000040>,
68 <0x00004800 0x08004800 0x00000040>,
69 <0x00004c80 0x08004c80 0x00000020>,
70 <0x00004cc0 0x08004cc0 0x00000010>,
71 <0x00004ce0 0x08004ce0 0x00000010>,
72 <0x00004d00 0x08004d00 0x00000010>,
73 <0x00004d40 0x08004d40 0x00000008>,
74 <0x00004d50 0x08004d50 0x00000008>,
75 <0x00008000 0x08008000 0x00000020>,
76 <0x00400000 0x08400000 0x00000020>;
78 timer_1ms: timer@0x400000 {
80 reg = <0x00400000 0x00000020>;
86 timer_0: timer@0x8000 {
88 reg = < 0x00008000 0x00000020 >;
94 sysid: sysid@0x4d40 {
96 reg = <0x00004d40 0x00000008>;
99 jtag_uart: serial@0x4d50 {
101 reg = <0x00004d50 0x00000008>;
106 tse_mac: ethernet@0x4000 {
108 reg = <0x00004000 0x00000400>,
109 <0x00004400 0x00000040>,
110 <0x00004800 0x00000040>,
111 <0x00002000 0x00002000>;
125 #size-cells = <0>;
133 uart: serial@0x4c80 {
135 reg = <0x00004c80 0x00000020>;
142 user_led_pio_8out: gpio@0x4cc0 {
144 reg = <0x00004cc0 0x00000010>;
152 user_dipsw_pio_8in: gpio@0x4ce0 {
154 reg = <0x00004ce0 0x00000010>;
158 level_trigger = <0>;
159 resetvalue = <0>;
166 user_pb_pio_4in: gpio@0x4d00 {
168 reg = <0x00004d00 0x00000010>;
172 level_trigger = <0>;
173 resetvalue = <0>;
181 cfi_flash_64m: flash@0x0 {
183 reg = <0x00000000 0x04000000>;
190 reg = <0x00800000 0x01e00000>;