Lines Matching +full:uart +full:- +full:16550 +full:- +full:compatible
1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
12 compatible = "altr,niosii-max10";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 u-boot,dm-pre-reloc;
23 compatible = "altr,nios2-1.1";
25 interrupt-controller;
26 #interrupt-cells = <1>;
27 altr,exception-addr = <0xc8000120>;
28 altr,fast-tlb-miss-addr = <0xc0000100>;
29 altr,has-div = <1>;
30 altr,has-initda = <1>;
31 altr,has-mmu = <1>;
32 altr,has-mul = <1>;
34 altr,pid-num-bits = <8>;
35 altr,reset-addr = <0xd4000000>;
36 altr,tlb-num-entries = <256>;
37 altr,tlb-num-ways = <16>;
38 altr,tlb-ptr-sz = <8>;
39 clock-frequency = <75000000>;
40 dcache-line-size = <32>;
41 dcache-size = <32768>;
42 icache-line-size = <32>;
43 icache-size = <32768>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "altr,avalon", "simple-bus";
59 bus-frequency = <75000000>;
62 compatible = "altr,juart-1.0";
64 interrupt-parent = <&cpu>;
69 compatible = "altr,16550-FIFO32", "ns16550a";
71 interrupt-parent = <&cpu>;
73 auto-flow-control = <1>;
74 clock-frequency = <50000000>;
75 fifo-size = <32>;
76 reg-io-width = <4>;
77 reg-shift = <2>;
81 compatible = "altr,quadspi-1.0";
84 reg-names = "avl_csr", "avl_mem";
85 interrupt-parent = <&cpu>;
87 #address-cells = <1>;
88 #size-cells = <0>;
90 compatible = "micron,n25q512a";
91 #address-cells = <1>;
92 #size-cells = <1>;
97 compatible = "altr,sysid-1.0";
102 compatible = "altr,tse-msgdma-1.0", "altr,tse-1.0";
109 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp",
111 interrupt-parent = <&cpu>;
113 interrupt-names = "rx_irq", "tx_irq";
114 rx-fifo-depth = <8192>;
115 tx-fifo-depth = <8192>;
116 address-bits = <48>;
117 max-frame-size = <1518>;
118 local-mac-address = [00 00 00 00 00 00];
119 altr,has-supplementary-unicast;
120 altr,enable-sup-addr = <1>;
121 altr,has-hash-multicast-filter;
122 altr,enable-hash = <1>;
123 phy-mode = "rgmii-id";
124 phy-handle = <&phy0>;
126 compatible = "altr,tse-mdio";
127 #address-cells = <1>;
128 #size-cells = <0>;
129 phy0: ethernet-phy@0 {
131 device_type = "ethernet-phy";
137 compatible = "altr,pll-1.0";
138 #clock-cells = <1>;
141 compatible = "fixed-clock";
142 #clock-cells = <0>;
143 clock-frequency = <125000000>;
144 clock-output-names = "enet_pll-c0";
148 compatible = "fixed-clock";
149 #clock-cells = <0>;
150 clock-frequency = <25000000>;
151 clock-output-names = "enet_pll-c1";
155 compatible = "fixed-clock";
156 #clock-cells = <0>;
157 clock-frequency = <2500000>;
158 clock-output-names = "enet_pll-c2";
163 compatible = "altr,pll-1.0";
164 #clock-cells = <1>;
167 compatible = "fixed-clock";
168 #clock-cells = <0>;
169 clock-frequency = <100000000>;
170 clock-output-names = "sys_pll-c0";
174 compatible = "fixed-clock";
175 #clock-cells = <0>;
176 clock-frequency = <50000000>;
177 clock-output-names = "sys_pll-c1";
181 compatible = "fixed-clock";
182 #clock-cells = <0>;
183 clock-frequency = <75000000>;
184 clock-output-names = "sys_pll-c2";
189 compatible = "altr,timer-1.0";
191 interrupt-parent = <&cpu>;
193 clock-frequency = <75000000>;
197 compatible = "altr,pio-1.0";
199 altr,gpio-bank-width = <4>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-bank-name = "led";
207 compatible = "altr,uart-1.0";
209 interrupt-parent = <&cpu>;
211 clock-frequency = <75000000>;
212 current-speed = <115200>;
216 compatible = "altr,pio-1.0";
218 interrupt-parent = <&cpu>;
220 altr,gpio-bank-width = <3>;
221 altr,interrupt-type = <2>;
225 #gpio-cells = <2>;
226 gpio-controller;
227 gpio-bank-name = "button";
231 compatible = "altr,timer-1.0";
233 interrupt-parent = <&cpu>;
235 clock-frequency = <75000000>;
239 compatible = "gpio-leds";
265 stdout-path = &a_16550_uart_0;