Lines Matching +full:0 +full:x00000020
18 #size-cells = <0>;
20 cpu: cpu@0 {
24 reg = <0x00000000>;
27 altr,exception-addr = <0xc8000120>;
28 altr,fast-tlb-miss-addr = <0xc0000100>;
35 altr,reset-addr = <0xd4000000>;
49 reg = <0x08000000 0x08000000>,
50 <0x00000000 0x00000400>;
53 sopc0: sopc@0 {
63 reg = <0x18001530 0x00000008>;
70 reg = <0x18001600 0x00000200>;
80 ext_flash: quadspi@0x180014a0 {
82 reg = <0x180014a0 0x00000020>,
83 <0x14000000 0x04000000>;
88 #size-cells = <0>;
89 flash0: nor0@0 {
98 reg = <0x18001528 0x00000008>;
103 reg = <0x00000400 0x00000400>,
104 <0x00000820 0x00000020>,
105 <0x00000800 0x00000020>,
106 <0x000008c0 0x00000008>,
107 <0x00000840 0x00000020>,
108 <0x00000860 0x00000020>;
128 #size-cells = <0>;
129 phy0: ethernet-phy@0 {
130 reg = <0>;
136 enet_pll: clock@0 {
142 #clock-cells = <0>;
149 #clock-cells = <0>;
156 #clock-cells = <0>;
168 #clock-cells = <0>;
175 #clock-cells = <0>;
182 #clock-cells = <0>;
190 reg = <0x18001440 0x00000020>;
192 interrupts = <0>;
198 reg = <0x180014d0 0x00000010>;
206 uart_0: serial@0x18001420 {
208 reg = <0x18001420 0x00000020>;
217 reg = <0x180014c0 0x00000010>;
223 level_trigger = <0>;
224 resetvalue = <0>;
232 reg = <0x00000880 0x00000020>;
243 gpios = <&led_pio 0 1>;