Lines Matching refs:VC3_MPAR_CL
25 #define VC3_MPAR_CL 6 macro
48 #define VC3_MPAR_CL 5 macro
71 #define VC3_MPAR_CL 5 macro
94 #define VC3_MPAR_CL 6 macro
117 #define VC3_MPAR_CL 6 macro
140 #define VC3_MPAR_CL 4 macro
197 #define VC3_MPAR_RL VC3_MPAR_CL
209 (VC3_MPAR_BURST_LENGTH == 8 ? 3 : 2) | (VC3_MPAR_CL << 4) | \
292 ICPU_MEMCTRL_TIMING0_WR_TO_PRECH_DLY(VC3_MPAR_CL + \
296 ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY(VC3_MPAR_CL - 3) | \
297 ICPU_MEMCTRL_TIMING0_RD_DATA_XFR_DLY(VC3_MPAR_CL - 3)
305 ICPU_MEMCTRL_TIMING1_WR_TO_RD_DLY(VC3_MPAR_CL + \
315 ICPU_MEMCTRL_TIMING3_WR_TO_RD_CS_CHANGE_DLY(VC3_MPAR_CL - 1) | \
316 ICPU_MEMCTRL_TIMING3_ODT_WR_DLY(VC3_MPAR_CL - 1) | \
317 ICPU_MEMCTRL_TIMING3_LOCAL_ODT_RD_DLY(VC3_MPAR_CL - 1)