mach-jz47xx/jz4780/pll.c

1 // SPDX-License-Identifier: GPL-2.0+
3  * JZ4780 PLL setup
12 #include <mach/jz4780.h>
362 		((((m) - 1) << 19) | (((n) - 1) << 13) | (((od) - 1) << 9))
373 	void __iomem *pll_reg = cpm_regs + CPM_CPAPCR + ((pll - 1) * 4);  in pll_init_one()
395 			((6 - 1) << CPM_CPCCR_H2DIV_BIT) |  in cpu_mux_select()
396 			((3 - 1) << CPM_CPCCR_H0DIV_BIT) |  in cpu_mux_select()
397 			((2 - 1) << CPM_CPCCR_L2DIV_BIT) |  in cpu_mux_select()
398 			((1 - 1) << CPM_CPCCR_CDIV_BIT);  in cpu_mux_select()
401 		clk_ctrl |= (12 - 1) << CPM_CPCCR_PDIV_BIT;  in cpu_mux_select()
403 		clk_ctrl |= (6 - 1) << CPM_CPCCR_PDIV_BIT;  in cpu_mux_select()
429 	writel(selectplls[pll] | CPM_DDRCDR_CE_DDR | (JZ4780_SYS_MEM_DIV - 1),  in ddr_mux_select()
469 	/* PLL stable time set to default -- 1ms */  in pll_init()
502 	u32 msc_cdr = JZ4780_SYS_MEM_SPEED / 24000000 / 2 - 1;  in jz4780_clk_ungate_mmc()
514 void jz4780_clk_ungate_uart(const unsigned int uart)  in jz4780_clk_ungate_uart()  argument
518 	if (uart == 0)  in jz4780_clk_ungate_uart()
520 	else if (uart == 1)  in jz4780_clk_ungate_uart()
522 	else if (uart == 2)  in jz4780_clk_ungate_uart()
524 	else if (uart == 3)  in jz4780_clk_ungate_uart()
526 	else if (uart == 4)  in jz4780_clk_ungate_uart()
529 		printf("%s[%i]: Invalid UART %d\n", __func__, __LINE__, uart);  in jz4780_clk_ungate_uart()