Lines Matching +full:32 +full:- +full:bit

1 // SPDX-License-Identifier: GPL-2.0+
11 	int port = gpio / 32;  in jz47xx_gpio_get_value()
12 	int pin = gpio % 32;  in jz47xx_gpio_get_value()
14 	return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin);  in jz47xx_gpio_get_value()
20 	int port = gpio / 32;  in jz47xx_gpio_direction_input()
21 	int pin = gpio % 32;  in jz47xx_gpio_direction_input()
23 	writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));  in jz47xx_gpio_direction_input()
24 	writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));  in jz47xx_gpio_direction_input()
25 	writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port));  in jz47xx_gpio_direction_input()
31 	int port = gpio / 32;  in jz47xx_gpio_direction_output()
32 	int pin = gpio % 32;  in jz47xx_gpio_direction_output()
34 	writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));  in jz47xx_gpio_direction_output()
35 	writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));  in jz47xx_gpio_direction_output()
36 	writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port));  in jz47xx_gpio_direction_output()
37 	writel(BIT(pin), gpio_regs +  in jz47xx_gpio_direction_output()