include/mach/jz4780.h

13 #define DDRC_BASE	0xb3010000
16 #define NEMC_BASE	0xb3410000
17 #define BCH_BASE	0xb34d0000
20 #define CPM_BASE	0xb0000000
21 #define TCU_BASE	0xb0002000
22 #define WDT_BASE	0xb0002000
23 #define GPIO_BASE	0xb0010000
24 #define UART0_BASE	0xb0030000
25 #define UART1_BASE	0xb0031000
26 #define UART2_BASE	0xb0032000
27 #define UART3_BASE	0xb0033000
28 #define MSC0_BASE	0xb3450000
29 #define MSC1_BASE	0xb3460000
30 #define MSC2_BASE	0xb3470000
35 /* n = 0,1,2,3,4,5 */
36 #define GPIO_PXPIN(n)	(0x00 + (n) * 0x100)
37 #define GPIO_PXINT(n)	(0x10 + (n) * 0x100)
38 #define GPIO_PXINTS(n)	(0x14 + (n) * 0x100)
39 #define GPIO_PXINTC(n)	(0x18 + (n) * 0x100)
40 #define GPIO_PXMASK(n)	(0x20 + (n) * 0x100)
41 #define GPIO_PXMASKS(n)	(0x24 + (n) * 0x100)
42 #define GPIO_PXMASKC(n)	(0x28 + (n) * 0x100)
43 #define GPIO_PXPAT1(n)	(0x30 + (n) * 0x100)
44 #define GPIO_PXPAT1S(n)	(0x34 + (n) * 0x100)
45 #define GPIO_PXPAT1C(n)	(0x38 + (n) * 0x100)
46 #define GPIO_PXPAT0(n)	(0x40 + (n) * 0x100)
47 #define GPIO_PXPAT0S(n)	(0x44 + (n) * 0x100)
48 #define GPIO_PXPAT0C(n)	(0x48 + (n) * 0x100)
49 #define GPIO_PXFLG(n)	(0x50 + (n) * 0x100)
50 #define GPIO_PXFLGC(n)	(0x54 + (n) * 0x100)
51 #define GPIO_PXOEN(n)	(0x60 + (n) * 0x100)
52 #define GPIO_PXOENS(n)	(0x64 + (n) * 0x100)
53 #define GPIO_PXOENC(n)	(0x68 + (n) * 0x100)
54 #define GPIO_PXPEN(n)	(0x70 + (n) * 0x100)
55 #define GPIO_PXPENS(n)	(0x74 + (n) * 0x100)
56 #define GPIO_PXPENC(n)	(0x78 + (n) * 0x100)
57 #define GPIO_PXDS(n)	(0x80 + (n) * 0x100)
58 #define GPIO_PXDSS(n)	(0x84 + (n) * 0x100)
59 #define GPIO_PXDSC(n)	(0x88 + (n) * 0x100)