mips/dts/mscc%2Cserval.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 	#address-cells = <1>;
8 	#size-cells = <1>;
12 		#address-cells = <1>;
13 		#size-cells = <0>;
27 	cpuintc: interrupt-controller@0 {
28 		#address-cells = <0>;
29 		#interrupt-cells = <1>;
30 		interrupt-controller;
31 		compatible = "mti,cpu-interrupt-controller";
34 	cpu_clk: cpu-clock {
35 		compatible = "fixed-clock";
36 		#clock-cells = <0>;
37 		clock-frequency = <416666666>;
40 	sys_clk: sys-clk {
41 		compatible = "fixed-clock";
42 		#clock-cells = <0>;
43 		clock-frequency = <208333333>;
46 	ahb_clk: ahb-clk {
47 		compatible = "fixed-clock";
48 		#clock-cells = <0>;
49 		clock-frequency = <208333333>;
53 		compatible = "simple-bus";
54 		#address-cells = <1>;
55 		#size-cells = <1>;
58 		interrupt-parent = <&intc>;
61 			compatible = "mscc,serval-cpu-syscon", "syscon";
65 		intc: interrupt-controller@70 {
66 			compatible = "mscc,serval-icpu-intr";
68 			#interrupt-cells = <1>;
69 			interrupt-controller;
70 			interrupt-parent = <&cpuintc>;
75 			pinctrl-0 = <&uart_pins>;
76 			pinctrl-names = "default";
81 			reg-io-width = <4>;
82 			reg-shift = <2>;
88 			pinctrl-0 = <&uart2_pins>;
89 			pinctrl-names = "default";
94 			reg-io-width = <4>;
95 			reg-shift = <2>;
101 			compatible = "mscc,serval-chip-reset";
105 		gpio: pinctrl@1070034 {  label
106 			compatible = "mscc,serval-pinctrl";
108 			gpio-controller;
109 			#gpio-cells = <2>;
110 			gpio-ranges = <&gpio 0 0 22>;
112 			sgpio_pins: sgpio-pins {
117 			uart_pins: uart-pins {
122 			uart2_pins: uart2-pins {
128 		spi0: spi-bitbang {
129 			compatible = "mscc,luton-bb-spi";
132 			num-chipselects = <1>;
133 			#address-cells = <1>;
134 			#size-cells = <0>;
137 		sgpio: gpio@10700b4 {  label
138 			compatible = "mscc,luton-sgpio";
141 			pinctrl-0 = <&sgpio_pins>;
142 			pinctrl-names = "default";
144 			gpio-controller;
145 			#gpio-cells = <2>;
146 			gpio-ranges = <&sgpio 0 0 64>;