mips/dts/img%2Cboston.dts

1 /dts-v1/;
3 #include <dt-bindings/clock/boston-clock.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
9 	#address-cells = <1>;
10 	#size-cells = <1>;
14 		stdout-path = &uart0;
18 		#address-cells = <1>;
19 		#size-cells = <0>;
34 	gic: interrupt-controller {
37 		interrupt-controller;
38 		#interrupt-cells = <3>;
41 			compatible = "mti,gic-timer";
42 			interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
49 		compatible = "xlnx,axi-pcie-host-1.00.a";
53 		#address-cells = <3>;
54 		#size-cells = <2>;
55 		#interrupt-cells = <1>;
57 		interrupt-parent = <&gic>;
63 		interrupt-map-mask = <0 0 0 7>;
64 		interrupt-map = <0 0 0 1 &pci0_intc 0>,
65 				<0 0 0 2 &pci0_intc 1>,
69 		pci0_intc: interrupt-controller {
70 			interrupt-controller;
71 			#address-cells = <0>;
72 			#interrupt-cells = <1>;
78 		compatible = "xlnx,axi-pcie-host-1.00.a";
82 		#address-cells = <3>;
83 		#size-cells = <2>;
84 		#interrupt-cells = <1>;
86 		interrupt-parent = <&gic>;
87 		interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
92 		interrupt-map-mask = <0 0 0 7>;
93 		interrupt-map = <0 0 0 1 &pci1_intc 0>,
94 				<0 0 0 2 &pci1_intc 1>,
98 		pci1_intc: interrupt-controller {
99 			interrupt-controller;
100 			#address-cells = <0>;
101 			#interrupt-cells = <1>;
106 		compatible = "xlnx,axi-pcie-host-1.00.a";
110 		#address-cells = <3>;
111 		#size-cells = <2>;
112 		#interrupt-cells = <1>;
114 		interrupt-parent = <&gic>;
120 		interrupt-map-mask = <0 0 0 7>;
121 		interrupt-map = <0 0 0 1 &pci2_intc 0>,
122 				<0 0 0 2 &pci2_intc 1>,
126 		pci2_intc: interrupt-controller {
127 			interrupt-controller;
128 			#address-cells = <0>;
129 			#interrupt-cells = <1>;
136 			#address-cells = <3>;
137 			#size-cells = <2>;
138 			#interrupt-cells = <1>;
140 			eg20t_bridge@1,0,0 {
144 				#address-cells = <3>;
145 				#size-cells = <2>;
146 				#interrupt-cells = <1>;
148 				eg20t_mac@2,0,1 {
151 					phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
158 					gpio-controller;
159 					#gpio-cells = <2>;
166 					#address-cells = <1>;
167 					#size-cells = <0>;
178 	plat_regs: system-controller@17ffd000 {
179 		compatible = "img,boston-platform-regs", "syscon";
181 		u-boot,dm-pre-reloc;
185 		compatible = "img,boston-clock";
186 		#clock-cells = <1>;
188 		u-boot,dm-pre-reloc;
191 	reboot: syscon-reboot {
192 		compatible = "syscon-reboot";
201 		reg-shift = <2>;
202 		reg-io-width = <4>;
204 		interrupt-parent = <&gic>;
209 		u-boot,dm-pre-reloc;
213 		compatible = "img,boston-lcd";
218 		compatible = "cfi-flash";
220 		bank-width = <2>;