Lines Matching +full:0 +full:x16000000

19 		#size-cells = <0>;
21 		cpu@0 {
24 			reg = <0>;
29 	memory@0 {
31 		reg = <0x00000000 0x10000000>;
51 		reg = <0x10000000 0x2000000>;
60 		ranges = <0x02000000 0 0x40000000
61 			  0x40000000 0 0x40000000>;
63 		interrupt-map-mask = <0 0 0 7>;
64 		interrupt-map = <0 0 0 1 &pci0_intc 0>,
65 				<0 0 0 2 &pci0_intc 1>,
66 				<0 0 0 3 &pci0_intc 2>,
67 				<0 0 0 4 &pci0_intc 3>;
71 			#address-cells = <0>;
80 		reg = <0x12000000 0x2000000>;
89 		ranges = <0x02000000 0 0x20000000
90 			  0x20000000 0 0x20000000>;
92 		interrupt-map-mask = <0 0 0 7>;
93 		interrupt-map = <0 0 0 1 &pci1_intc 0>,
94 				<0 0 0 2 &pci1_intc 1>,
95 				<0 0 0 3 &pci1_intc 2>,
96 				<0 0 0 4 &pci1_intc 3>;
100 			#address-cells = <0>;
108 		reg = <0x14000000 0x2000000>;
115 		interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
117 		ranges = <0x02000000 0 0x16000000
118 			  0x16000000 0 0x100000>;
120 		interrupt-map-mask = <0 0 0 7>;
121 		interrupt-map = <0 0 0 1 &pci2_intc 0>,
122 				<0 0 0 2 &pci2_intc 1>,
123 				<0 0 0 3 &pci2_intc 2>,
124 				<0 0 0 4 &pci2_intc 3>;
128 			#address-cells = <0>;
132 		pci2_root@0,0,0 {
134 			reg = <0x00000000 0 0 0 0>;
140 			eg20t_bridge@1,0,0 {
142 				reg = <0x00010000 0 0 0 0>;
148 				eg20t_mac@2,0,1 {
150 					reg = <0x00020100 0 0 0 0>;
154 				eg20t_gpio: eg20t_gpio@2,0,2 {
156 					reg = <0x00020200 0 0 0 0>;
164 					reg = <0x00026200 0 0 0 0>;
167 					#size-cells = <0>;
169 					rtc@0x68 {
171 						reg = <0x68>;
180 		reg = <0x17ffd000 0x1000>;
194 		offset = <0x10>;
195 		mask = <0x10>;
200 		reg = <0x17ffe000 0x1000>;
214 		reg = <0x17fff000 0x8>;
219 		reg = <0x18000000 0x8000000>;