Lines Matching full:val
9 #define NGET(val, fslnum) \ argument
10 __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
12 #define GET(val, fslnum) \ argument
13 __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
15 #define NCGET(val, fslnum) \ argument
16 __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
18 #define CGET(val, fslnum) \ argument
19 __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
21 #define NPUT(val, fslnum) \ argument
22 __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
24 #define PUT(val, fslnum) \ argument
25 __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
27 #define NCPUT(val, fslnum) \ argument
28 __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
30 #define CPUT(val, fslnum) \ argument
31 __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
35 #define MFS(val, reg) \ argument
36 __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
38 #define MTS(val, reg) \ argument
39 __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
42 #define R14(val) \ argument
43 __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
46 #define R17(val) \ argument
47 __asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
53 #define MSRSET(val) \ argument
54 __asm__ __volatile__ ("msrset r0," #val );
56 #define MSRCLR(val) \ argument
57 __asm__ __volatile__ ("msrclr r0," #val );
60 #define MSRSET(val) \ argument
65 ori %0, %0, "#val"; \
69 : "d" (val) \
73 #define MSRCLR(val) \ argument
78 andi %0, %0, ~"#val"; \
82 : "d" (val) \