13 	int i = 0;  in dcache_status()
14 	int mask = 0x80;  in dcache_status()
15 	__asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");  in dcache_status()
16 	/* i&=0x80 */  in dcache_status()
17 	__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");  in dcache_status()
23 	int i = 0;  in icache_status()
24 	int mask = 0x20;  in icache_status()
25 	__asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");  in icache_status()
26 	/* i&=0x20 */  in icache_status()
27 	__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");  in icache_status()
32 	MSRSET(0x20);  in icache_enable()
37 	flush_cache(0, 32768);  in icache_disable()
38 	MSRCLR(0x20);  in icache_disable()
42 	MSRSET(0x80);  in dcache_enable()
47 	flush_cache(0, XILINX_DCACHE_BYTE_SIZE);  in dcache_disable()
49 	MSRCLR(0x80);  in dcache_disable()
55 	for (i = 0; i < size; i += 4)  in flush_cache()
58 				"wic	%0, r0;"  in flush_cache()
62 				"wdc.flush	%0, r0;"  in flush_cache()