Lines Matching +full:0 +full:x100002
14 #define PLL_SYNCR_LOLRE (0x8000)
15 #define PLL_SYNCR_MFD2 (0x4000)
16 #define PLL_SYNCR_MFD1 (0x2000)
17 #define PLL_SYNCR_MFD0 (0x1000)
18 #define PLL_SYNCR_LOCRE (0x0800)
19 #define PLL_SYNCR_RFC2 (0x0400)
20 #define PLL_SYNCR_RFC1 (0x0200)
21 #define PLL_SYNCR_RFC0 (0x0100)
22 #define PLL_SYNCR_LOCEN (0x0080)
23 #define PLL_SYNCR_DISCLK (0x0040)
24 #define PLL_SYNCR_FWKUP (0x0020)
25 #define PLL_SYNCR_STPMD1 (0x0008)
26 #define PLL_SYNCR_STPMD0 (0x0004)
29 #define PLL_SYNSR_MODE (0x0080)
30 #define PLL_SYNSR_PLLSEL (0x0040)
31 #define PLL_SYNSR_PLLREF (0x0020)
32 #define PLL_SYNSR_LOCKS (0x0010)
33 #define PLL_SYNSR_LOCK (0x0008)
34 #define PLL_SYNSR_LOCS (0x0004)
39 #define INT0_LO_RSVD0 (0)
111 #define MCFGPIO_PORTA (*(vu_char *) (CONFIG_SYS_MBAR+0x100000))
112 #define MCFGPIO_PORTB (*(vu_char *) (CONFIG_SYS_MBAR+0x100001))
113 #define MCFGPIO_PORTC (*(vu_char *) (CONFIG_SYS_MBAR+0x100002))
114 #define MCFGPIO_PORTD (*(vu_char *) (CONFIG_SYS_MBAR+0x100003))
115 #define MCFGPIO_PORTE (*(vu_char *) (CONFIG_SYS_MBAR+0x100004))
116 #define MCFGPIO_PORTF (*(vu_char *) (CONFIG_SYS_MBAR+0x100005))
117 #define MCFGPIO_PORTG (*(vu_char *) (CONFIG_SYS_MBAR+0x100006))
118 #define MCFGPIO_PORTH (*(vu_char *) (CONFIG_SYS_MBAR+0x100007))
119 #define MCFGPIO_PORTJ (*(vu_char *) (CONFIG_SYS_MBAR+0x100008))
120 #define MCFGPIO_PORTDD (*(vu_char *) (CONFIG_SYS_MBAR+0x100009))
121 #define MCFGPIO_PORTEH (*(vu_char *) (CONFIG_SYS_MBAR+0x10000A))
122 #define MCFGPIO_PORTEL (*(vu_char *) (CONFIG_SYS_MBAR+0x10000B))
123 #define MCFGPIO_PORTAS (*(vu_char *) (CONFIG_SYS_MBAR+0x10000C))
124 #define MCFGPIO_PORTQS (*(vu_char *) (CONFIG_SYS_MBAR+0x10000D))
125 #define MCFGPIO_PORTSD (*(vu_char *) (CONFIG_SYS_MBAR+0x10000E))
126 #define MCFGPIO_PORTTC (*(vu_char *) (CONFIG_SYS_MBAR+0x10000F))
127 #define MCFGPIO_PORTTD (*(vu_char *) (CONFIG_SYS_MBAR+0x100010))
128 #define MCFGPIO_PORTUA (*(vu_char *) (CONFIG_SYS_MBAR+0x100011))
130 #define MCFGPIO_DDRA (*(vu_char *) (CONFIG_SYS_MBAR+0x100014))
131 #define MCFGPIO_DDRB (*(vu_char *) (CONFIG_SYS_MBAR+0x100015))
132 #define MCFGPIO_DDRC (*(vu_char *) (CONFIG_SYS_MBAR+0x100016))
133 #define MCFGPIO_DDRD (*(vu_char *) (CONFIG_SYS_MBAR+0x100017))
134 #define MCFGPIO_DDRE (*(vu_char *) (CONFIG_SYS_MBAR+0x100018))
135 #define MCFGPIO_DDRF (*(vu_char *) (CONFIG_SYS_MBAR+0x100019))
136 #define MCFGPIO_DDRG (*(vu_char *) (CONFIG_SYS_MBAR+0x10001A))
137 #define MCFGPIO_DDRH (*(vu_char *) (CONFIG_SYS_MBAR+0x10001B))
138 #define MCFGPIO_DDRJ (*(vu_char *) (CONFIG_SYS_MBAR+0x10001C))
139 #define MCFGPIO_DDRDD (*(vu_char *) (CONFIG_SYS_MBAR+0x10001D))
140 #define MCFGPIO_DDREH (*(vu_char *) (CONFIG_SYS_MBAR+0x10001E))
141 #define MCFGPIO_DDREL (*(vu_char *) (CONFIG_SYS_MBAR+0x10001F))
142 #define MCFGPIO_DDRAS (*(vu_char *) (CONFIG_SYS_MBAR+0x100020))
143 #define MCFGPIO_DDRQS (*(vu_char *) (CONFIG_SYS_MBAR+0x100021))
144 #define MCFGPIO_DDRSD (*(vu_char *) (CONFIG_SYS_MBAR+0x100022))
145 #define MCFGPIO_DDRTC (*(vu_char *) (CONFIG_SYS_MBAR+0x100023))
146 #define MCFGPIO_DDRTD (*(vu_char *) (CONFIG_SYS_MBAR+0x100024))
147 #define MCFGPIO_DDRUA (*(vu_char *) (CONFIG_SYS_MBAR+0x100025))
149 #define MCFGPIO_PORTAP (*(vu_char *) (CONFIG_SYS_MBAR+0x100028))
150 #define MCFGPIO_PORTBP (*(vu_char *) (CONFIG_SYS_MBAR+0x100029))
151 #define MCFGPIO_PORTCP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002A))
152 #define MCFGPIO_PORTDP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002B))
153 #define MCFGPIO_PORTEP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002C))
154 #define MCFGPIO_PORTFP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002D))
155 #define MCFGPIO_PORTGP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002E))
156 #define MCFGPIO_PORTHP (*(vu_char *) (CONFIG_SYS_MBAR+0x10002F))
157 #define MCFGPIO_PORTJP (*(vu_char *) (CONFIG_SYS_MBAR+0x100030))
158 #define MCFGPIO_PORTDDP (*(vu_char *) (CONFIG_SYS_MBAR+0x100031))
159 #define MCFGPIO_PORTEHP (*(vu_char *) (CONFIG_SYS_MBAR+0x100032))
160 #define MCFGPIO_PORTELP (*(vu_char *) (CONFIG_SYS_MBAR+0x100033))
161 #define MCFGPIO_PORTASP (*(vu_char *) (CONFIG_SYS_MBAR+0x100034))
162 #define MCFGPIO_PORTQSP (*(vu_char *) (CONFIG_SYS_MBAR+0x100035))
163 #define MCFGPIO_PORTSDP (*(vu_char *) (CONFIG_SYS_MBAR+0x100036))
164 #define MCFGPIO_PORTTCP (*(vu_char *) (CONFIG_SYS_MBAR+0x100037))
165 #define MCFGPIO_PORTTDP (*(vu_char *) (CONFIG_SYS_MBAR+0x100038))
166 #define MCFGPIO_PORTUAP (*(vu_char *) (CONFIG_SYS_MBAR+0x100039))
168 #define MCFGPIO_SETA (*(vu_char *) (CONFIG_SYS_MBAR+0x100028))
169 #define MCFGPIO_SETB (*(vu_char *) (CONFIG_SYS_MBAR+0x100029))
170 #define MCFGPIO_SETC (*(vu_char *) (CONFIG_SYS_MBAR+0x10002A))
171 #define MCFGPIO_SETD (*(vu_char *) (CONFIG_SYS_MBAR+0x10002B))
172 #define MCFGPIO_SETE (*(vu_char *) (CONFIG_SYS_MBAR+0x10002C))
173 #define MCFGPIO_SETF (*(vu_char *) (CONFIG_SYS_MBAR+0x10002D))
174 #define MCFGPIO_SETG (*(vu_char *) (CONFIG_SYS_MBAR+0x10002E))
175 #define MCFGPIO_SETH (*(vu_char *) (CONFIG_SYS_MBAR+0x10002F))
176 #define MCFGPIO_SETJ (*(vu_char *) (CONFIG_SYS_MBAR+0x100030))
177 #define MCFGPIO_SETDD (*(vu_char *) (CONFIG_SYS_MBAR+0x100031))
178 #define MCFGPIO_SETEH (*(vu_char *) (CONFIG_SYS_MBAR+0x100032))
179 #define MCFGPIO_SETEL (*(vu_char *) (CONFIG_SYS_MBAR+0x100033))
180 #define MCFGPIO_SETAS (*(vu_char *) (CONFIG_SYS_MBAR+0x100034))
181 #define MCFGPIO_SETQS (*(vu_char *) (CONFIG_SYS_MBAR+0x100035))
182 #define MCFGPIO_SETSD (*(vu_char *) (CONFIG_SYS_MBAR+0x100036))
183 #define MCFGPIO_SETTC (*(vu_char *) (CONFIG_SYS_MBAR+0x100037))
184 #define MCFGPIO_SETTD (*(vu_char *) (CONFIG_SYS_MBAR+0x100038))
185 #define MCFGPIO_SETUA (*(vu_char *) (CONFIG_SYS_MBAR+0x100039))
187 #define MCFGPIO_CLRA (*(vu_char *) (CONFIG_SYS_MBAR+0x10003C))
188 #define MCFGPIO_CLRB (*(vu_char *) (CONFIG_SYS_MBAR+0x10003D))
189 #define MCFGPIO_CLRC (*(vu_char *) (CONFIG_SYS_MBAR+0x10003E))
190 #define MCFGPIO_CLRD (*(vu_char *) (CONFIG_SYS_MBAR+0x10003F))
191 #define MCFGPIO_CLRE (*(vu_char *) (CONFIG_SYS_MBAR+0x100040))
192 #define MCFGPIO_CLRF (*(vu_char *) (CONFIG_SYS_MBAR+0x100041))
193 #define MCFGPIO_CLRG (*(vu_char *) (CONFIG_SYS_MBAR+0x100042))
194 #define MCFGPIO_CLRH (*(vu_char *) (CONFIG_SYS_MBAR+0x100043))
195 #define MCFGPIO_CLRJ (*(vu_char *) (CONFIG_SYS_MBAR+0x100044))
196 #define MCFGPIO_CLRDD (*(vu_char *) (CONFIG_SYS_MBAR+0x100045))
197 #define MCFGPIO_CLREH (*(vu_char *) (CONFIG_SYS_MBAR+0x100046))
198 #define MCFGPIO_CLREL (*(vu_char *) (CONFIG_SYS_MBAR+0x100047))
199 #define MCFGPIO_CLRAS (*(vu_char *) (CONFIG_SYS_MBAR+0x100048))
200 #define MCFGPIO_CLRQS (*(vu_char *) (CONFIG_SYS_MBAR+0x100049))
201 #define MCFGPIO_CLRSD (*(vu_char *) (CONFIG_SYS_MBAR+0x10004A))
202 #define MCFGPIO_CLRTC (*(vu_char *) (CONFIG_SYS_MBAR+0x10004B))
203 #define MCFGPIO_CLRTD (*(vu_char *) (CONFIG_SYS_MBAR+0x10004C))
204 #define MCFGPIO_CLRUA (*(vu_char *) (CONFIG_SYS_MBAR+0x10004D))
206 #define MCFGPIO_PBCDPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100050))
207 #define MCFGPIO_PFPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100051))
208 #define MCFGPIO_PEPAR (*(vu_short *)(CONFIG_SYS_MBAR+0x100052))
209 #define MCFGPIO_PJPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100054))
210 #define MCFGPIO_PSDPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100055))
211 #define MCFGPIO_PASPAR (*(vu_short *)(CONFIG_SYS_MBAR+0x100056))
212 #define MCFGPIO_PEHLPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100058))
213 #define MCFGPIO_PQSPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x100059))
214 #define MCFGPIO_PTCPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x10005A))
215 #define MCFGPIO_PTDPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x10005B))
216 #define MCFGPIO_PUAPAR (*(vu_char *) (CONFIG_SYS_MBAR+0x10005C))
219 #define MCFGPIO_PORT7 (0x80)
220 #define MCFGPIO_PORT6 (0x40)
221 #define MCFGPIO_PORT5 (0x20)
222 #define MCFGPIO_PORT4 (0x10)
223 #define MCFGPIO_PORT3 (0x08)
224 #define MCFGPIO_PORT2 (0x04)
225 #define MCFGPIO_PORT1 (0x02)
226 #define MCFGPIO_PORT0 (0x01)
227 #define MCFGPIO_PORT(x) (0x01<<x)
229 #define MCFGPIO_DDR7 (0x80)
230 #define MCFGPIO_DDR6 (0x40)
231 #define MCFGPIO_DDR5 (0x20)
232 #define MCFGPIO_DDR4 (0x10)
233 #define MCFGPIO_DDR3 (0x08)
234 #define MCFGPIO_DDR2 (0x04)
235 #define MCFGPIO_DDR1 (0x02)
236 #define MCFGPIO_DDR0 (0x01)
237 #define MCFGPIO_DDR(x) (0x01<<x)
239 #define MCFGPIO_Px7 (0x80)
240 #define MCFGPIO_Px6 (0x40)
241 #define MCFGPIO_Px5 (0x20)
242 #define MCFGPIO_Px4 (0x10)
243 #define MCFGPIO_Px3 (0x08)
244 #define MCFGPIO_Px2 (0x04)
245 #define MCFGPIO_Px1 (0x02)
246 #define MCFGPIO_Px0 (0x01)
247 #define MCFGPIO_Px(x) (0x01<<x)
249 #define MCFGPIO_PBCDPAR_PBPA (0x80)
250 #define MCFGPIO_PBCDPAR_PCDPA (0x40)
252 #define MCFGPIO_PEPAR_PEPA7 (0x4000)
253 #define MCFGPIO_PEPAR_PEPA6 (0x1000)
254 #define MCFGPIO_PEPAR_PEPA5 (0x0400)
255 #define MCFGPIO_PEPAR_PEPA4 (0x0100)
256 #define MCFGPIO_PEPAR_PEPA3 (0x0040)
257 #define MCFGPIO_PEPAR_PEPA2 (0x0010)
258 #define MCFGPIO_PEPAR_PEPA1(x) (((x)&0x3)<<2)
259 #define MCFGPIO_PEPAR_PEPA0(x) (((x)&0x3))
261 #define MCFGPIO_PFPAR_PFPA7 (0x80)
262 #define MCFGPIO_PFPAR_PFPA6 (0x40)
263 #define MCFGPIO_PFPAR_PFPA5 (0x20)
265 #define MCFGPIO_PJPAR_PJPA7 (0x80)
266 #define MCFGPIO_PJPAR_PJPA6 (0x40)
267 #define MCFGPIO_PJPAR_PJPA5 (0x20)
268 #define MCFGPIO_PJPAR_PJPA4 (0x10)
269 #define MCFGPIO_PJPAR_PJPA3 (0x08)
270 #define MCFGPIO_PJPAR_PJPA2 (0x04)
271 #define MCFGPIO_PJPAR_PJPA1 (0x02)
272 #define MCFGPIO_PJPAR_PJPA0 (0x01)
273 #define MCFGPIO_PJPAR_PJPA(x) (0x01<<x)
275 #define MCFGPIO_PSDPAR_PSDPA (0x80)
277 #define MCFGPIO_PASPAR_PASPA5(x) (((x)&0x3)<<10)
278 #define MCFGPIO_PASPAR_PASPA4(x) (((x)&0x3)<<8)
279 #define MCFGPIO_PASPAR_PASPA3(x) (((x)&0x3)<<6)
280 #define MCFGPIO_PASPAR_PASPA2(x) (((x)&0x3)<<4)
281 #define MCFGPIO_PASPAR_PASPA1(x) (((x)&0x3)<<2)
282 #define MCFGPIO_PASPAR_PASPA0(x) (((x)&0x3))
284 #define MCFGPIO_PEHLPAR_PEHPA (0x80)
285 #define MCFGPIO_PEHLPAR_PELPA (0x40)
287 #define MCFGPIO_PQSPAR_PQSPA6 (0x40)
288 #define MCFGPIO_PQSPAR_PQSPA5 (0x20)
289 #define MCFGPIO_PQSPAR_PQSPA4 (0x10)
290 #define MCFGPIO_PQSPAR_PQSPA3 (0x08)
291 #define MCFGPIO_PQSPAR_PQSPA2 (0x04)
292 #define MCFGPIO_PQSPAR_PQSPA1 (0x02)
293 #define MCFGPIO_PQSPAR_PQSPA0 (0x01)
294 #define MCFGPIO_PQSPAR_PQSPA(x) (0x01<<x)
296 #define MCFGPIO_PTCPAR_PTCPA3(x) (((x)&0x3)<<6)
297 #define MCFGPIO_PTCPAR_PTCPA2(x) (((x)&0x3)<<4)
298 #define MCFGPIO_PTCPAR_PTCPA1(x) (((x)&0x3)<<2)
299 #define MCFGPIO_PTCPAR_PTCPA0(x) (((x)&0x3))
301 #define MCFGPIO_PTDPAR_PTDPA3(x) (((x)&0x3)<<6)
302 #define MCFGPIO_PTDPAR_PTDPA2(x) (((x)&0x3)<<4)
303 #define MCFGPIO_PTDPAR_PTDPA1(x) (((x)&0x3)<<2)
304 #define MCFGPIO_PTDPAR_PTDPA0(x) (((x)&0x3))
306 #define MCFGPIO_PUAPAR_PUAPA3 (0x08)
307 #define MCFGPIO_PUAPAR_PUAPA2 (0x04)
308 #define MCFGPIO_PUAPAR_PUAPA1 (0x02)
309 #define MCFGPIO_PUAPAR_PUAPA0 (0x01)
313 #define MCFSCM_RAMBAR (*(vu_long *) (CONFIG_SYS_MBAR+0x00000008))
314 #define MCFSCM_CRSR (*(vu_char *) (CONFIG_SYS_MBAR+0x00000010))
315 #define MCFSCM_CWCR (*(vu_char *) (CONFIG_SYS_MBAR+0x00000011))
316 #define MCFSCM_LPICR (*(vu_char *) (CONFIG_SYS_MBAR+0x00000012))
317 #define MCFSCM_CWSR (*(vu_char *) (CONFIG_SYS_MBAR+0x00000013))
319 #define MCFSCM_MPARK (*(vu_long *) (CONFIG_SYS_MBAR+0x0000001C))
320 #define MCFSCM_MPR (*(vu_char *) (CONFIG_SYS_MBAR+0x00000020))
321 #define MCFSCM_PACR0 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000024))
322 #define MCFSCM_PACR1 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000025))
323 #define MCFSCM_PACR2 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000026))
324 #define MCFSCM_PACR3 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000027))
325 #define MCFSCM_PACR4 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000028))
326 #define MCFSCM_PACR5 (*(vu_char *) (CONFIG_SYS_MBAR+0x0000002A))
327 #define MCFSCM_PACR6 (*(vu_char *) (CONFIG_SYS_MBAR+0x0000002B))
328 #define MCFSCM_PACR7 (*(vu_char *) (CONFIG_SYS_MBAR+0x0000002C))
329 #define MCFSCM_PACR8 (*(vu_char *) (CONFIG_SYS_MBAR+0x0000002E))
330 #define MCFSCM_GPACR0 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000030))
331 #define MCFSCM_GPACR1 (*(vu_char *) (CONFIG_SYS_MBAR+0x00000031))
333 #define MCFSCM_CRSR_EXT (0x80)
334 #define MCFSCM_CRSR_CWDR (0x20)
335 #define MCFSCM_RAMBAR_BA(x) ((x)&0xFFFF0000)
336 #define MCFSCM_RAMBAR_BDE (0x00000200)
340 #define MCFRESET_RCR (*(vu_char *) (CONFIG_SYS_MBAR+0x00110000))
341 #define MCFRESET_RSR (*(vu_char *) (CONFIG_SYS_MBAR+0x00110001))
343 #define MCFRESET_RCR_SOFTRST (0x80)
344 #define MCFRESET_RCR_FRCRSTOUT (0x40)
345 #define MCFRESET_RCR_LVDF (0x10)
346 #define MCFRESET_RCR_LVDIE (0x08)
347 #define MCFRESET_RCR_LVDRE (0x04)
348 #define MCFRESET_RCR_LVDE (0x01)
350 #define MCFRESET_RSR_LVD (0x40)
351 #define MCFRESET_RSR_SOFT (0x20)
352 #define MCFRESET_RSR_WDR (0x10)
353 #define MCFRESET_RSR_POR (0x08)
354 #define MCFRESET_RSR_EXT (0x04)
355 #define MCFRESET_RSR_LOC (0x02)
356 #define MCFRESET_RSR_LOL (0x01)
357 #define MCFRESET_RSR_ALL (0x7F)
358 #define MCFRESET_RCR_SOFTRST (0x80)
359 #define MCFRESET_RCR_FRCRSTOUT (0x40)
363 #define MCFCCM_CCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00110004))
364 #define MCFCCM_RCON (*(vu_short *)(CONFIG_SYS_MBAR+0x00110008))
365 #define MCFCCM_CIR (*(vu_short *)(CONFIG_SYS_MBAR+0x0011000A))
368 #define MCFCCM_CCR_LOAD (0x8000)
369 #define MCFCCM_CCR_MODE(x) (((x)&0x0007)<<8)
370 #define MCFCCM_CCR_SZEN (0x0040)
371 #define MCFCCM_CCR_PSTEN (0x0020)
372 #define MCFCCM_CCR_BME (0x0008)
373 #define MCFCCM_CCR_BMT(x) (((x)&0x0007))
375 #define MCFCCM_CIR_PIN_MASK (0xFF00)
376 #define MCFCCM_CIR_PRN_MASK (0x00FF)
380 #define MCFCLOCK_SYNCR (*(vu_short *)(CONFIG_SYS_MBAR+0x120000))
381 #define MCFCLOCK_SYNSR (*(vu_char *) (CONFIG_SYS_MBAR+0x120002))
383 #define MCFCLOCK_SYNCR_MFD(x) (((x)&0x0007)<<12)
384 #define MCFCLOCK_SYNCR_RFD(x) (((x)&0x0007)<<8)
385 #define MCFCLOCK_SYNSR_LOCK 0x08
387 #define MCFSDRAMC_DCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00000040))
388 #define MCFSDRAMC_DACR0 (*(vu_long *) (CONFIG_SYS_MBAR+0x00000048))
389 #define MCFSDRAMC_DMR0 (*(vu_long *) (CONFIG_SYS_MBAR+0x0000004c))
390 #define MCFSDRAMC_DACR1 (*(vu_long *) (CONFIG_SYS_MBAR+0x00000050))
391 #define MCFSDRAMC_DMR1 (*(vu_long *) (CONFIG_SYS_MBAR+0x00000054))
393 #define MCFSDRAMC_DCR_NAM (0x2000)
394 #define MCFSDRAMC_DCR_COC (0x1000)
395 #define MCFSDRAMC_DCR_IS (0x0800)
396 #define MCFSDRAMC_DCR_RTIM_3 (0x0000)
397 #define MCFSDRAMC_DCR_RTIM_6 (0x0200)
398 #define MCFSDRAMC_DCR_RTIM_9 (0x0400)
399 #define MCFSDRAMC_DCR_RC(x) ((x)&0x01FF)
401 #define MCFSDRAMC_DACR_BASE(x) ((x)&0xFFFC0000)
402 #define MCFSDRAMC_DACR_RE (0x00008000)
403 #define MCFSDRAMC_DACR_CASL(x) (((x)&0x03)<<12)
404 #define MCFSDRAMC_DACR_CBM(x) (((x)&0x07)<<8)
405 #define MCFSDRAMC_DACR_PS_32 (0x00000000)
406 #define MCFSDRAMC_DACR_PS_16 (0x00000020)
407 #define MCFSDRAMC_DACR_PS_8 (0x00000010)
408 #define MCFSDRAMC_DACR_IP (0x00000008)
409 #define MCFSDRAMC_DACR_IMRS (0x00000040)
411 #define MCFSDRAMC_DMR_BAM_16M (0x00FC0000)
412 #define MCFSDRAMC_DMR_WP (0x00000100)
413 #define MCFSDRAMC_DMR_CI (0x00000040)
414 #define MCFSDRAMC_DMR_AM (0x00000020)
415 #define MCFSDRAMC_DMR_SC (0x00000010)
416 #define MCFSDRAMC_DMR_SD (0x00000008)
417 #define MCFSDRAMC_DMR_UC (0x00000004)
418 #define MCFSDRAMC_DMR_UD (0x00000002)
419 #define MCFSDRAMC_DMR_V (0x00000001)
421 #define MCFWTM_WCR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140000))
422 #define MCFWTM_WMR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140002))
423 #define MCFWTM_WCNTR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140004))
424 #define MCFWTM_WSR (*(vu_short *)(CONFIG_SYS_MBAR+0x00140006))
430 #define MCFGPTA_GPTIOS (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0000))
431 #define MCFGPTA_GPTCFORC (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0001))
432 #define MCFGPTA_GPTOC3M (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0002))
433 #define MCFGPTA_GPTOC3D (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0003))
434 #define MCFGPTA_GPTCNT (*(vu_short *)(CONFIG_SYS_MBAR+0x1A0004))
435 #define MCFGPTA_GPTSCR1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0006))
436 #define MCFGPTA_GPTTOV (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0008))
437 #define MCFGPTA_GPTCTL1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0009))
438 #define MCFGPTA_GPTCTL2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A000B))
439 #define MCFGPTA_GPTIE (*(vu_char *)(CONFIG_SYS_MBAR+0x1A000C))
440 #define MCFGPTA_GPTSCR2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A000D))
441 #define MCFGPTA_GPTFLG1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A000E))
442 #define MCFGPTA_GPTFLG2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1A000F))
443 #define MCFGPTA_GPTC0 (*(vu_short *)(CONFIG_SYS_MBAR+0x1A0010))
444 #define MCFGPTA_GPTC1 (*(vu_short *)(CONFIG_SYS_MBAR+0x1A0012))
445 #define MCFGPTA_GPTC2 (*(vu_short *)(CONFIG_SYS_MBAR+0x1A0014))
446 #define MCFGPTA_GPTC3 (*(vu_short *)(CONFIG_SYS_MBAR+0x1A0016))
447 #define MCFGPTA_GPTPACTL (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0018))
448 #define MCFGPTA_GPTPAFLG (*(vu_char *)(CONFIG_SYS_MBAR+0x1A0019))
449 #define MCFGPTA_GPTPACNT (*(vu_short *)(CONFIG_SYS_MBAR+0x1A001A))
450 #define MCFGPTA_GPTPORT (*(vu_char *)(CONFIG_SYS_MBAR+0x1A001D))
451 #define MCFGPTA_GPTDDR (*(vu_char *)(CONFIG_SYS_MBAR+0x1A001E))
453 #define MCFGPTB_GPTIOS (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0000))
454 #define MCFGPTB_GPTCFORC (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0001))
455 #define MCFGPTB_GPTOC3M (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0002))
456 #define MCFGPTB_GPTOC3D (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0003))
457 #define MCFGPTB_GPTCNT (*(vu_short *)(CONFIG_SYS_MBAR+0x1B0004))
458 #define MCFGPTB_GPTSCR1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0006))
459 #define MCFGPTB_GPTTOV (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0008))
460 #define MCFGPTB_GPTCTL1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0009))
461 #define MCFGPTB_GPTCTL2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B000B))
462 #define MCFGPTB_GPTIE (*(vu_char *)(CONFIG_SYS_MBAR+0x1B000C))
463 #define MCFGPTB_GPTSCR2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B000D))
464 #define MCFGPTB_GPTFLG1 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B000E))
465 #define MCFGPTB_GPTFLG2 (*(vu_char *)(CONFIG_SYS_MBAR+0x1B000F))
466 #define MCFGPTB_GPTC0 (*(vu_short *)(CONFIG_SYS_MBAR+0x1B0010))
467 #define MCFGPTB_GPTC1 (*(vu_short *)(CONFIG_SYS_MBAR+0x1B0012))
468 #define MCFGPTB_GPTC2 (*(vu_short *)(CONFIG_SYS_MBAR+0x1B0014))
469 #define MCFGPTB_GPTC3 (*(vu_short *)(CONFIG_SYS_MBAR+0x1B0016))
470 #define MCFGPTB_GPTPACTL (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0018))
471 #define MCFGPTB_GPTPAFLG (*(vu_char *)(CONFIG_SYS_MBAR+0x1B0019))
472 #define MCFGPTB_GPTPACNT (*(vu_short *)(CONFIG_SYS_MBAR+0x1B001A))
473 #define MCFGPTB_GPTPORT (*(vu_char *)(CONFIG_SYS_MBAR+0x1B001D))
474 #define MCFGPTB_GPTDDR (*(vu_char *)(CONFIG_SYS_MBAR+0x1B001E))
477 #define MCFGPT_GPTIOS_IOS3 (0x08)
478 #define MCFGPT_GPTIOS_IOS2 (0x04)
479 #define MCFGPT_GPTIOS_IOS1 (0x02)
480 #define MCFGPT_GPTIOS_IOS0 (0x01)
482 #define MCFGPT_GPTCFORC_FOC3 (0x08)
483 #define MCFGPT_GPTCFORC_FOC2 (0x04)
484 #define MCFGPT_GPTCFORC_FOC1 (0x02)
485 #define MCFGPT_GPTCFORC_FOC0 (0x01)
487 #define MCFGPT_GPTOC3M_OC3M3 (0x08)
488 #define MCFGPT_GPTOC3M_OC3M2 (0x04)
489 #define MCFGPT_GPTOC3M_OC3M1 (0x02)
490 #define MCFGPT_GPTOC3M_OC3M0 (0x01)
492 #define MCFGPT_GPTOC3M_OC3D(x) (((x)&0x04))
494 #define MCFGPT_GPTSCR1_GPTEN (0x80)
495 #define MCFGPT_GPTSCR1_TFFCA (0x10)
497 #define MCFGPT_GPTTOV3 (0x08)
498 #define MCFGPT_GPTTOV2 (0x04)
499 #define MCFGPT_GPTTOV1 (0x02)
500 #define MCFGPT_GPTTOV0 (0x01)
502 #define MCFGPT_GPTCTL_OMOL3(x) (((x)&0x03)<<6)
503 #define MCFGPT_GPTCTL_OMOL2(x) (((x)&0x03)<<4)
504 #define MCFGPT_GPTCTL_OMOL1(x) (((x)&0x03)<<2)
505 #define MCFGPT_GPTCTL_OMOL0(x) (((x)&0x03))
507 #define MCFGPT_GPTCTL2_EDG3(x) (((x)&0x03)<<6)
508 #define MCFGPT_GPTCTL2_EDG2(x) (((x)&0x03)<<4)
509 #define MCFGPT_GPTCTL2_EDG1(x) (((x)&0x03)<<2)
510 #define MCFGPT_GPTCTL2_EDG0(x) (((x)&0x03))
512 #define MCFGPT_GPTIE_C3I (0x08)
513 #define MCFGPT_GPTIE_C2I (0x04)
514 #define MCFGPT_GPTIE_C1I (0x02)
515 #define MCFGPT_GPTIE_C0I (0x01)
517 #define MCFGPT_GPTSCR2_TOI (0x80)
518 #define MCFGPT_GPTSCR2_PUPT (0x20)
519 #define MCFGPT_GPTSCR2_RDPT (0x10)
520 #define MCFGPT_GPTSCR2_TCRE (0x08)
521 #define MCFGPT_GPTSCR2_PR(x) (((x)&0x07))
523 #define MCFGPT_GPTFLG1_C3F (0x08)
524 #define MCFGPT_GPTFLG1_C2F (0x04)
525 #define MCFGPT_GPTFLG1_C1F (0x02)
526 #define MCFGPT_GPTFLG1_C0F (0x01)
528 #define MCFGPT_GPTFLG2_TOF (0x80)
529 #define MCFGPT_GPTFLG2_C3F (0x08)
530 #define MCFGPT_GPTFLG2_C2F (0x04)
531 #define MCFGPT_GPTFLG2_C1F (0x02)
532 #define MCFGPT_GPTFLG2_C0F (0x01)
534 #define MCFGPT_GPTPACTL_PAE (0x40)
535 #define MCFGPT_GPTPACTL_PAMOD (0x20)
536 #define MCFGPT_GPTPACTL_PEDGE (0x10)
537 #define MCFGPT_GPTPACTL_CLK_PACLK (0x04)
538 #define MCFGPT_GPTPACTL_CLK_PACLK256 (0x08)
539 #define MCFGPT_GPTPACTL_CLK_PACLK65536 (0x0C)
540 #define MCFGPT_GPTPACTL_CLK(x) (((x)&0x03)<<2)
541 #define MCFGPT_GPTPACTL_PAOVI (0x02)
542 #define MCFGPT_GPTPACTL_PAI (0x01)
544 #define MCFGPT_GPTPAFLG_PAOVF (0x02)
545 #define MCFGPT_GPTPAFLG_PAIF (0x01)
547 #define MCFGPT_GPTPORT_PORTT3 (0x08)
548 #define MCFGPT_GPTPORT_PORTT2 (0x04)
549 #define MCFGPT_GPTPORT_PORTT1 (0x02)
550 #define MCFGPT_GPTPORT_PORTT0 (0x01)
552 #define MCFGPT_GPTDDR_DDRT3 (0x08)
553 #define MCFGPT_GPTDDR_DDRT2 (0x04)
554 #define MCFGPT_GPTDDR_DDRT1 (0x02)
555 #define MCFGPT_GPTDDR_DDRT0 (0x01)
559 #define MCFCFM_MCR (*(vu_short *)(CONFIG_SYS_MBAR+0x1D0000))
560 #define MCFCFM_MCR_LOCK (0x0400)
561 #define MCFCFM_MCR_PVIE (0x0200)
562 #define MCFCFM_MCR_AEIE (0x0100)
563 #define MCFCFM_MCR_CBEIE (0x0080)
564 #define MCFCFM_MCR_CCIE (0x0040)
565 #define MCFCFM_MCR_KEYACC (0x0020)
567 #define MCFCFM_CLKD (*(vu_char *)(CONFIG_SYS_MBAR+0x1D0002))
569 #define MCFCFM_SEC (*(vu_long*) (CONFIG_SYS_MBAR+0x1D0008))
570 #define MCFCFM_SEC_KEYEN (0x80000000)
571 #define MCFCFM_SEC_SECSTAT (0x40000000)
573 #define MCFCFM_PROT (*(vu_long*) (CONFIG_SYS_MBAR+0x1D0010))
574 #define MCFCFM_SACC (*(vu_long*) (CONFIG_SYS_MBAR+0x1D0014))
575 #define MCFCFM_DACC (*(vu_long*) (CONFIG_SYS_MBAR+0x1D0018))
576 #define MCFCFM_USTAT (*(vu_char*) (CONFIG_SYS_MBAR+0x1D0020))
577 #define MCFCFM_USTAT_CBEIF 0x80
578 #define MCFCFM_USTAT_CCIF 0x40
579 #define MCFCFM_USTAT_PVIOL 0x20
580 #define MCFCFM_USTAT_ACCERR 0x10
581 #define MCFCFM_USTAT_BLANK 0x04
583 #define MCFCFM_CMD (*(vu_char*) (CONFIG_SYS_MBAR+0x1D0024))
584 #define MCFCFM_CMD_ERSVER 0x05
585 #define MCFCFM_CMD_PGERSVER 0x06
586 #define MCFCFM_CMD_PGM 0x20
587 #define MCFCFM_CMD_PGERS 0x40
588 #define MCFCFM_CMD_MASERS 0x41