Lines Matching +full:0 +full:x000500

16 #define PLL_PLLCR		(0x000180)
18 #define SIM_RSR			(0x000000)
19 #define SIM_SYPCR		(0x000001)
20 #define SIM_SWIVR		(0x000002)
21 #define SIM_SWSR		(0x000003)
22 #define SIM_MPARK		(0x00000C)
25 #define SIM_RSR_SWTR		(0x20)
26 #define SIM_RSR_HRST		(0x80)
29 #define CIM_MISCCR		(0x000500)
30 #define CIM_ATA_DADDR		(0x000504)
31 #define CIM_ATA_DCOUNT		(0x000508)
32 #define CIM_RTC_TIME		(0x00050C)
33 #define CIM_USB_CANCLK		(0x000510)
36 #define CIM_MISCCR_ADTA		(0x00000001)
37 #define CIM_MISCCR_ADTD		(0x00000002)
38 #define CIM_MISCCR_ADIE		(0x00000004)
39 #define CIM_MISCCR_ADIC		(0x00000008)
40 #define CIM_MISCCR_ADIP		(0x00000010)
41 #define CIM_MISCCR_CPUEND	(0x00000020)
42 #define CIM_MISCCR_DMAEND	(0x00000040)
43 #define CIM_MISCCR_RTCCLR	(0x00000080)
44 #define CIM_MISCCR_RTCPL	(0x00000100)
45 #define CIM_MISCCR_URIE		(0x00000800)
46 #define CIM_MISCCR_URIC		(0x00001000)
47 #define CIM_MISCCR_URIP		(0x00002000)
50 #define CIM_ATA_DADDR_ATAADDR(x)	(((x)&0x00003FFF)<<2)
51 #define CIM_ATA_DADDR_RAMADDR(x)	(((x)&0x00003FFF)<<18)
54 #define CIM_ATA_DCOUNT_COUNT(x)		(((x)&0x0000FFFF))