Lines Matching defs:usb_otg

317 typedef struct usb_otg {  struct
318 u32 id; /* 0x000 Identification Register */
319 u32 hwgeneral; /* 0x004 General HW Parameters */
320 u32 hwhost; /* 0x008 Host HW Parameters */
321 u32 hwdev; /* 0x00C Device HW parameters */
322 u32 hwtxbuf; /* 0x010 TX Buffer HW Parameters */
323 u32 hwrxbuf; /* 0x014 RX Buffer HW Parameters */
324 u32 res1[58]; /* 0x18 - 0xFF */
325 u8 caplength; /* 0x100 Capability Register Length */
326 u8 res2; /* 0x101 */
327 u16 hciver; /* 0x102 Host Interface Version Number */
328 u32 hcsparams; /* 0x104 Host Structural Parameters */
329 u32 hccparams; /* 0x108 Host Capability Parameters */
330 u32 res3[5]; /* 0x10C - 0x11F */
331 u16 dciver; /* 0x120 Device Interface Version Number */
332 u16 res4; /* 0x122 */
333 u32 dccparams; /* 0x124 Device Capability Parameters */
334 u32 res5[6]; /* 0x128 - 0x13F */
335 u32 cmd; /* 0x140 USB Command */
336 u32 sts; /* 0x144 USB Status */
337 u32 intr; /* 0x148 USB Interrupt Enable */
338 u32 frindex; /* 0x14C USB Frame Index */
339 u32 res6; /* 0x150 */
340 u32 prd_dev; /* 0x154 Periodic Frame List Base or Device Address */
341 u32 aync_ep; /* 0x158 Current Asynchronous List or Address at Endpoint List Address */
342 u32 ttctrl; /* 0x15C Host TT Asynchronous Buffer Control */
343 u32 burstsize; /* 0x160 Master Interface Data Burst Size */
344 u32 txfill; /* 0x164 Host Transmit FIFO Tuning Control */
345 u32 res7[6]; /* 0x168 - 0x17F */
346 u32 cfgflag; /* 0x180 Configure Flag Register */
347 u32 portsc1; /* 0x184 Port Status/Control */
348 u32 res8[7]; /* 0x188 - 0x1A3 */
349 u32 otgsc; /* 0x1A4 On The Go Status and Control */
350 u32 mode; /* 0x1A8 USB mode register */
351 u32 eptsetstat; /* 0x1AC Endpoint Setup status */
352 u32 eptprime; /* 0x1B0 Endpoint initialization */
353 u32 eptflush; /* 0x1B4 Endpoint de-initialize */
354 u32 eptstat; /* 0x1B8 Endpoint status */
355 u32 eptcomplete; /* 0x1BC Endpoint Complete */
356 u32 eptctrl0; /* 0x1C0 Endpoint control 0 */
357 u32 eptctrl1; /* 0x1C4 Endpoint control 1 */
358 u32 eptctrl2; /* 0x1C8 Endpoint control 2 */
359 u32 eptctrl3; /* 0x1CC Endpoint control 3 */