Lines Matching refs:u32
34 u32 reserved0[36];
35 u32 cpu_r5_ctrl; /* 0x90 */
36 u32 reserved1[37];
37 u32 timestamp_ref_ctrl; /* 0x128 */
38 u32 reserved2[53];
39 u32 boot_mode; /* 0x200 */
40 u32 reserved3_0[7];
41 u32 reset_reason; /* 0x220 */
42 u32 reserved3_1[6];
43 u32 rst_lpd_top; /* 0x23C */
44 u32 reserved4[4];
45 u32 boot_pin_ctrl; /* 0x250 */
46 u32 reserved5[21];
56 u32 counter_control_register;
57 u32 reserved0[7];
58 u32 base_frequency_id_register;
83 u32 mio_pin[78];
84 u32 reserved[442];
92 u32 rpu_glbl_ctrl;
93 u32 reserved0[63];
94 u32 rpu0_cfg; /* 0x100 */
95 u32 reserved1[63];
96 u32 rpu1_cfg; /* 0x200 */
104 u32 reserved0[65];
105 u32 rst_fpd_apu; /* 0x104 */
106 u32 reserved1;
114 u32 reserved0[16];
115 u32 rvbar_addr0_l; /* 0x40 */
116 u32 rvbar_addr0_h; /* 0x44 */
117 u32 reserved1[20];
133 u32 reserved0[17];
134 u32 version;
142 u32 reserved[18];
143 u32 gen_storage6; /* 0x48 */