Lines Matching refs:PHY_REG_SHIFT
12 #define PHY_REG_SHIFT 2 macro
14 #define PHY_RIDR (0x000 << PHY_REG_SHIFT)
15 #define PHY_PIR (0x001 << PHY_REG_SHIFT)
34 #define PHY_PGCR0 (0x002 << PHY_REG_SHIFT)
35 #define PHY_PGCR1 (0x003 << PHY_REG_SHIFT)
37 #define PHY_PGSR0 (0x004 << PHY_REG_SHIFT)
60 #define PHY_PGSR1 (0x005 << PHY_REG_SHIFT)
62 #define PHY_PLLCR (0x006 << PHY_REG_SHIFT)
63 #define PHY_PTR0 (0x007 << PHY_REG_SHIFT)
64 #define PHY_PTR1 (0x008 << PHY_REG_SHIFT)
65 #define PHY_PTR2 (0x009 << PHY_REG_SHIFT)
66 #define PHY_PTR3 (0x00A << PHY_REG_SHIFT)
67 #define PHY_PTR4 (0x00B << PHY_REG_SHIFT)
68 #define PHY_ACMDLR (0x00C << PHY_REG_SHIFT)
69 #define PHY_ACBDLR (0x00D << PHY_REG_SHIFT)
70 #define PHY_ACIOCR (0x00E << PHY_REG_SHIFT)
71 #define PHY_DXCCR (0x00F << PHY_REG_SHIFT)
88 #define PHY_DSGCR (0x010 << PHY_REG_SHIFT)
89 #define PHY_DCR (0x011 << PHY_REG_SHIFT)
90 #define PHY_DTPR0 (0x012 << PHY_REG_SHIFT)
91 #define PHY_DTPR1 (0x013 << PHY_REG_SHIFT)
92 #define PHY_DTPR2 (0x014 << PHY_REG_SHIFT)
93 #define PHY_MR0 (0x015 << PHY_REG_SHIFT)
94 #define PHY_MR1 (0x016 << PHY_REG_SHIFT)
95 #define PHY_MR2 (0x017 << PHY_REG_SHIFT)
96 #define PHY_MR3 (0x018 << PHY_REG_SHIFT)
97 #define PHY_ODTCR (0x019 << PHY_REG_SHIFT)
98 #define PHY_DTCR (0x01A << PHY_REG_SHIFT)
104 #define PHY_DTAR0 (0x01B << PHY_REG_SHIFT)
105 #define PHY_DTAR1 (0x01C << PHY_REG_SHIFT)
106 #define PHY_DTAR2 (0x01D << PHY_REG_SHIFT)
107 #define PHY_DTAR3 (0x01E << PHY_REG_SHIFT)
108 #define PHY_DTDR0 (0x01F << PHY_REG_SHIFT)
109 #define PHY_DTDR1 (0x020 << PHY_REG_SHIFT)
110 #define PHY_DTEDR0 (0x021 << PHY_REG_SHIFT)
111 #define PHY_DTEDR1 (0x022 << PHY_REG_SHIFT)
112 #define PHY_PGCR2 (0x023 << PHY_REG_SHIFT)
113 #define PHY_GPR0 (0x05E << PHY_REG_SHIFT)
114 #define PHY_GPR1 (0x05F << PHY_REG_SHIFT)
116 #define PHY_ZQ_BASE (0x060 << PHY_REG_SHIFT)
117 #define PHY_ZQ_STRIDE (0x004 << PHY_REG_SHIFT)
118 #define PHY_ZQ_CR0 (0x000 << PHY_REG_SHIFT)
119 #define PHY_ZQ_CR1 (0x001 << PHY_REG_SHIFT)
120 #define PHY_ZQ_SR0 (0x002 << PHY_REG_SHIFT)
121 #define PHY_ZQ_SR1 (0x003 << PHY_REG_SHIFT)
123 #define PHY_DX_BASE (0x070 << PHY_REG_SHIFT)
124 #define PHY_DX_STRIDE (0x010 << PHY_REG_SHIFT)
125 #define PHY_DX_GCR (0x000 << PHY_REG_SHIFT)
128 #define PHY_DX_GSR0 (0x001 << PHY_REG_SHIFT)
129 #define PHY_DX_GSR1 (0x002 << PHY_REG_SHIFT)
130 #define PHY_DX_BDLR0 (0x003 << PHY_REG_SHIFT)
131 #define PHY_DX_BDLR1 (0x004 << PHY_REG_SHIFT)
132 #define PHY_DX_BDLR2 (0x005 << PHY_REG_SHIFT)
133 #define PHY_DX_BDLR3 (0x006 << PHY_REG_SHIFT)
134 #define PHY_DX_BDLR4 (0x007 << PHY_REG_SHIFT)
135 #define PHY_DX_LCDLR0 (0x008 << PHY_REG_SHIFT)
136 #define PHY_DX_LCDLR1 (0x009 << PHY_REG_SHIFT)
137 #define PHY_DX_LCDLR2 (0x00A << PHY_REG_SHIFT)
138 #define PHY_DX_MDLR (0x00B << PHY_REG_SHIFT)
139 #define PHY_DX_GTR (0x00C << PHY_REG_SHIFT)
140 #define PHY_DX_GSR2 (0x00D << PHY_REG_SHIFT)