Lines Matching +full:0 +full:x000fffff
23 /* set 0 to SNRT(UPLLCTRL.bit28) and K_LD(UPLLCTRL.bit[27]) */ in upll_init()
25 tmp &= ~0x18000000; in upll_init()
32 tmp &= ~0x07ffffff; in upll_init()
33 tmp |= 0x0228f5c0; in upll_init()
36 tmp &= ~0x07ffffff; in upll_init()
37 tmp |= 0x02328000; in upll_init()
44 tmp |= 0x08000000; in upll_init()
51 tmp |= 0x10000000; in upll_init()
64 tmp |= 0x00000001; in vpll_init()
67 tmp |= 0x00000001; in vpll_init()
70 /* Set 0 to VPLA_K_LD and VPLB_K_LD */ in vpll_init()
72 tmp &= ~0x10000000; in vpll_init()
75 tmp &= ~0x10000000; in vpll_init()
78 /* Set 0 to VPLA_SNRST and VPLB_SNRST */ in vpll_init()
80 tmp &= ~0x10000000; in vpll_init()
83 tmp &= ~0x10000000; in vpll_init()
86 /* Set 0x20 to VPLA_SNRST and VPLB_SNRST */ in vpll_init()
88 tmp &= ~0x0000007f; in vpll_init()
89 tmp |= 0x00000020; in vpll_init()
92 tmp &= ~0x0000007f; in vpll_init()
93 tmp |= 0x00000020; in vpll_init()
100 tmp &= ~0x000fffff; in vpll_init()
101 tmp |= 0x00066664; in vpll_init()
104 tmp &= ~0x000fffff; in vpll_init()
105 tmp |= 0x00066664; in vpll_init()
110 tmp &= ~0x000fffff; in vpll_init()
111 tmp |= 0x000f5800; in vpll_init()
114 tmp &= ~0x000fffff; in vpll_init()
115 tmp |= 0x000f5800; in vpll_init()
121 tmp |= 0x10000000; in vpll_init()
124 tmp |= 0x10000000; in vpll_init()
130 /* Set 0 to VPLA_SNRST and VPLB_SNRST */ in vpll_init()
132 tmp |= 0x10000000; in vpll_init()
135 tmp |= 0x10000000; in vpll_init()
138 /* set 0 to VPLA27WP and VPLA27WP */ in vpll_init()
140 tmp &= ~0x00000001; in vpll_init()
143 tmp |= ~0x00000001; in vpll_init()