35 	u32 tmp;  in uniphier_ld20_sscpll_init()  local
42 		tmp = readl(base);	/* SSCPLLCTRL */  in uniphier_ld20_sscpll_init()
43 		tmp &= ~SC_PLLCTRL_SSC_DK_MASK;  in uniphier_ld20_sscpll_init()
44 		tmp |= FIELD_PREP(SC_PLLCTRL_SSC_DK_MASK,  in uniphier_ld20_sscpll_init()
47 		writel(tmp, base);  in uniphier_ld20_sscpll_init()
49 		tmp = readl(base + 4);  in uniphier_ld20_sscpll_init()
50 		tmp &= ~SC_PLLCTRL2_SSC_JK_MASK;  in uniphier_ld20_sscpll_init()
51 		tmp |= FIELD_PREP(SC_PLLCTRL2_SSC_JK_MASK,  in uniphier_ld20_sscpll_init()
54 		writel(tmp, base + 4);  in uniphier_ld20_sscpll_init()
59 	tmp = readl(base + 4);		/* SSCPLLCTRL2 */  in uniphier_ld20_sscpll_init()
60 	tmp |= SC_PLLCTRL2_NRSTDS;  in uniphier_ld20_sscpll_init()
61 	writel(tmp, base + 4);  in uniphier_ld20_sscpll_init()
71 	u32 tmp;  in uniphier_ld20_sscpll_ssc_en()  local
77 	tmp = readl(base);	/* SSCPLLCTRL */  in uniphier_ld20_sscpll_ssc_en()
78 	tmp |= SC_PLLCTRL_SSC_EN;  in uniphier_ld20_sscpll_ssc_en()
79 	writel(tmp, base);  in uniphier_ld20_sscpll_ssc_en()
89 	u32 tmp;  in uniphier_ld20_sscpll_set_regi()  local
95 	tmp = readl(base + 8);	/* SSCPLLCTRL3 */  in uniphier_ld20_sscpll_set_regi()
96 	tmp &= ~SC_PLLCTRL3_REGI_MASK;  in uniphier_ld20_sscpll_set_regi()
97 	tmp |= FIELD_PREP(SC_PLLCTRL3_REGI_MASK, regi);  in uniphier_ld20_sscpll_set_regi()
98 	writel(tmp, base + 8);  in uniphier_ld20_sscpll_set_regi()
108 	u32 tmp;  in uniphier_ld20_vpll27_init()  local
114 	tmp = readl(base);		/* VPLL27CTRL */  in uniphier_ld20_vpll27_init()
115 	tmp |= SC_VPLL27CTRL_WP;	/* write protect off */  in uniphier_ld20_vpll27_init()
116 	writel(tmp, base);  in uniphier_ld20_vpll27_init()
118 	tmp = readl(base + 8);		/* VPLL27CTRL3 */  in uniphier_ld20_vpll27_init()
119 	tmp |= SC_VPLL27CTRL3_K_LD;  in uniphier_ld20_vpll27_init()
120 	writel(tmp, base + 8);  in uniphier_ld20_vpll27_init()
122 	tmp = readl(base);		/* VPLL27CTRL */  in uniphier_ld20_vpll27_init()
123 	tmp &= ~SC_VPLL27CTRL_WP;	/* write protect on */  in uniphier_ld20_vpll27_init()
124 	writel(tmp, base);  in uniphier_ld20_vpll27_init()
134 	u32 tmp;  in uniphier_ld20_dspll_init()  local
140 	tmp = readl(base + 4);		/* DSPLLCTRL2 */  in uniphier_ld20_dspll_init()
141 	tmp |= SC_DSPLLCTRL2_K_LD;  in uniphier_ld20_dspll_init()
142 	writel(tmp, base + 4);  in uniphier_ld20_dspll_init()