mach-tegra/tegra210/xusb-padctl.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
6 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
13 #include "../xusb-padctl-common.h"
17 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
34 	"xusb",
36 	"pcie-x1",
37 	"pcie-x4",
74 	TEGRA210_LANE("otg-0",     0x004,  0, 0x3, 0, otg),
75 	TEGRA210_LANE("otg-1",     0x004,  2, 0x3, 0, otg),
76 	TEGRA210_LANE("otg-2",     0x004,  4, 0x3, 0, otg),
77 	TEGRA210_LANE("otg-3",     0x004,  6, 0x3, 0, otg),
78 	TEGRA210_LANE("usb2-bias", 0x004, 18, 0x3, 0, otg),
79 	TEGRA210_LANE("hsic-0",    0x004, 14, 0x1, 0, usb),
80 	TEGRA210_LANE("hsic-1",    0x004, 15, 0x1, 0, usb),
81 	TEGRA210_LANE("pcie-0",    0x028, 12, 0x3, 1, pci),
82 	TEGRA210_LANE("pcie-1",    0x028, 14, 0x3, 2, pci),
83 	TEGRA210_LANE("pcie-2",    0x028, 16, 0x3, 3, pci),
84 	TEGRA210_LANE("pcie-3",    0x028, 18, 0x3, 4, pci),
85 	TEGRA210_LANE("pcie-4",    0x028, 20, 0x3, 5, pci),
86 	TEGRA210_LANE("pcie-5",    0x028, 22, 0x3, 6, pci),
87 	TEGRA210_LANE("pcie-6",    0x028, 24, 0x3, 7, pci),
88 	TEGRA210_LANE("sata-0",    0x028, 30, 0x3, 8, pci),
100 	if (padctl->enable++ > 0)  in tegra_xusb_padctl_enable()
126 	if (padctl->enable == 0) {  in tegra_xusb_padctl_disable()
131 	if (--padctl->enable > 0)  in tegra_xusb_padctl_disable()
157 	err = tegra_xusb_padctl_enable(phy->padctl);  in phy_prepare()
170 	return tegra_xusb_padctl_disable(phy->padctl);  in phy_unprepare()
217 	struct tegra_xusb_padctl *padctl = phy->padctl;  in pcie_phy_enable()
287 		return -ETIMEDOUT;  in pcie_phy_enable()
306 		return -ETIMEDOUT;  in pcie_phy_enable()
324 		return -ETIMEDOUT;  in pcie_phy_enable()
343 		return -ETIMEDOUT;  in pcie_phy_enable()
361 		return -ETIMEDOUT;  in pcie_phy_enable()
436 						"nvidia,tegra210-xusb-padctl");  in tegra_xusb_padctl_init()
447 		count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl",  in tegra_xusb_padctl_init()