Lines Matching +full:tegra20 +full:- +full:vi

1 // SPDX-License-Identifier: GPL-2.0+
6 /* Tegra20 pin multiplexing functions */
151 	MUXCTL_NONE = -1,
253 	PUCTL_NONE = -1
269 /* A normal pin group where the mux name and pull-up name match */
273 /* A pin group where the pull-up name doesn't have a 1-1 mapping */
297 	PIN(DTA,    RSVD1,     SDIO2,     VI,        RSVD4),
298 	PIN(DTB,    RSVD1,     RSVD2,     VI,        SPI1),
299 	PIN(DTC,    RSVD1,     RSVD2,     VI,        RSVD4),
300 	PIN(DTD,    RSVD1,     SDIO2,     VI,        RSVD4),
301 	PIN(DTE,    RSVD1,     RSVD2,     VI,        SPI1),
408 	PIN(DTF,    I2C3,      RSVD2,     VI,        RSVD4),