81 	int node;  in emc_get_controller()  local
83 	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC);  in emc_get_controller()
84 	if (node > 0) {  in emc_get_controller()
85 		addr = fdtdec_get_addr(blob, node, "reg");  in emc_get_controller()
108  * If this is not present, then the EMC tables are directly below 'node',
113  * @param node		EMC node (nvidia,tegra20-emc compatible string)
117 static int find_emc_tables(const void *blob, int node, int ram_code)  in find_emc_tables()  argument
124 	need_ram_code = fdtdec_get_bool(blob, node, "nvidia,use-ram-code");  in find_emc_tables()
126 		return node;  in find_emc_tables()
132 	offset = node;  in find_emc_tables()
160  * Decode the EMC node of the device tree, returning a pointer to the emc
179 	int node;  in decode_emc()  local
189 	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC);  in decode_emc()
190 	if (node < 0) {  in decode_emc()
191 		debug("%s: No EMC node found in FDT\n", __func__);  in decode_emc()
194 	*emcp = (struct emc_ctlr *)fdtdec_get_addr(blob, node, "reg");  in decode_emc()
196 		debug("%s: No EMC node reg property\n", __func__);  in decode_emc()
200 	/* Work out the parent node which contains our EMC tables */  in decode_emc()
201 	node = find_emc_tables(blob, node, ram_code & 3);  in decode_emc()
202 	if (node < 0)  in decode_emc()
203 		return node;  in decode_emc()
209 		node = fdtdec_next_compatible_subnode(blob, node,  in decode_emc()
211 		if (node < 0)  in decode_emc()
213 		node_rate = fdtdec_get_int(blob, node, "clock-frequency", -1);  in decode_emc()
222 	if (node < 0) {  in decode_emc()
223 		debug("%s: No node found for clock frequency %d\n", __func__,  in decode_emc()
228 	*tablep = fdtdec_locate_array(blob, node, "nvidia,emc-registers",  in decode_emc()
231 		debug("%s: node '%s' array missing / wrong size\n", __func__,  in decode_emc()
232 		      fdt_get_name(blob, node, NULL));  in decode_emc()