mach-tegra/tegra20/cpu.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
9 #include <asm/arch-tegra/pmc.h>
17 	reg = readl(&pmc->pmc_cntrl);  in enable_cpu_power_rail()
19 	writel(reg, &pmc->pmc_cntrl);  in enable_cpu_power_rail()
22 	 * The TI PMU65861C needs a 3.75ms delay between enabling  in enable_cpu_power_rail()
23 	 * the power rail and enabling the CPU clock.  This delay  in enable_cpu_power_rail()
35 	/* Hold the CPUs in reset */  in start_cpu()
45 	 * Set the entry point for CPU execution from reset,  in start_cpu()
46 	 *  if it's a non-zero value.  in start_cpu()
57 	/* Take the CPU out of reset */  in start_cpu()