Lines Matching +full:ulpi +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
24 /* Offset 0x3000 */
25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
33 PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI),
34 PIN(ULPI_DIR_PY1, SPI1, SPI5, UARTD, ULPI),
35 PIN(ULPI_NXT_PY2, SPI1, SPI5, UARTD, ULPI),
36 PIN(ULPI_STP_PY3, SPI1, SPI5, UARTD, ULPI),
51 /* Offset 0x3068 */
94 /* Offset 0x3110 */
116 /* Offset 0x3164 */
189 /* Offset 0x3284 */
230 /* Offset 0x3324 */
258 /* Offset 0x3390 */
270 /* Offset 0x33bc */
275 /* Offset 0x33cc */
281 /* Offset 0x33e0 */
302 /* Offset 0x3430 */
319 /* Offset 0x820 */