Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:spi
1 // SPDX-License-Identifier: GPL-2.0+
17 * This is a very simple U-Boot image loading implementation, trying to
19 * know the exact pins where the SPI Flash is connected and also know
22 * of the SPI framework. Moreover, we rely on the default settings of
23 * the SPI controler hardware registers and only adjust what needs to
27 * There are two variants of the SPI controller in Allwinner SoCs:
28 * A10/A13/A20 (sun4i variant) and everything else (sun6i variant).
31 * The pin mixing part is SoC specific and only A10/A13/A20/H3/A64 are
36 /* SUN4I variant of the SPI controller */
54 /* SUN6I variant of the SPI controller */
87 * Allwinner A10/A20 SoCs were using pins PC0,PC1,PC2,PC23 for booting
88 * from SPI Flash, everything else is using pins PC0,PC1,PC2,PC3.
123 /* Enable SPI in the master mode and do a soft reset */ in spi0_enable_clock()
131 /* Enable SPI in the master mode and reset FIFO */ in spi0_enable_clock()
219 while (bufsize-- > 0) in sunxi_spi0_read_data()
222 /* tSHSL time is up to 100 ns in various SPI flash datasheets */ in sunxi_spi0_read_data()
258 len -= chunk_len; in spi0_read_data()
302 spi0_read_data((void *)spl_image->load_addr, in spl_spi_load_image()
303 CONFIG_SYS_SPI_U_BOOT_OFFS, spl_image->size); in spl_spi_load_image()
311 SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image);