94 	struct sunxi_mctl_com_reg * const mctl_com =  in mctl_init()  local
226 	setbits_le32(&mctl_com->ccr, 0x80000);  in mctl_init()
268 	struct sunxi_mctl_com_reg * const mctl_com =  in sunxi_dram_init()  local
287 		       &mctl_com->cr);  in sunxi_dram_init()
288 		setbits_le32(&mctl_com->swonr, 0x0003ffff);  in sunxi_dram_init()
294 		clrsetbits_le32(&mctl_com->cr, MCTL_CR_ROW_MASK,  in sunxi_dram_init()
302 		       &mctl_com->cr);  in sunxi_dram_init()
303 		setbits_le32(&mctl_com->swonr, 0x0003ffff);  in sunxi_dram_init()
307 	writel(0x00000008, &mctl_com->mcr0_0);  in sunxi_dram_init()
308 	writel(0x0001000d, &mctl_com->mcr1_0);  in sunxi_dram_init()
309 	writel(0x00000004, &mctl_com->mcr0_1);  in sunxi_dram_init()
310 	writel(0x00000080, &mctl_com->mcr1_1);  in sunxi_dram_init()
311 	writel(0x00000004, &mctl_com->mcr0_2);  in sunxi_dram_init()
312 	writel(0x00000019, &mctl_com->mcr1_2);  in sunxi_dram_init()
313 	writel(0x00000004, &mctl_com->mcr0_3);  in sunxi_dram_init()
314 	writel(0x00000080, &mctl_com->mcr1_3);  in sunxi_dram_init()
315 	writel(0x00000004, &mctl_com->mcr0_4);  in sunxi_dram_init()
316 	writel(0x01010040, &mctl_com->mcr1_4);  in sunxi_dram_init()
317 	writel(0x00000004, &mctl_com->mcr0_5);  in sunxi_dram_init()
318 	writel(0x0001002f, &mctl_com->mcr1_5);  in sunxi_dram_init()
319 	writel(0x00000004, &mctl_com->mcr0_6);  in sunxi_dram_init()
320 	writel(0x00010020, &mctl_com->mcr1_6);  in sunxi_dram_init()
321 	writel(0x00000004, &mctl_com->mcr0_7);  in sunxi_dram_init()
322 	writel(0x00010020, &mctl_com->mcr1_7);  in sunxi_dram_init()
323 	writel(0x00000008, &mctl_com->mcr0_8);  in sunxi_dram_init()
324 	writel(0x00000001, &mctl_com->mcr1_8);  in sunxi_dram_init()
325 	writel(0x00000008, &mctl_com->mcr0_9);  in sunxi_dram_init()
326 	writel(0x00000005, &mctl_com->mcr1_9);  in sunxi_dram_init()
327 	writel(0x00000008, &mctl_com->mcr0_10);  in sunxi_dram_init()
328 	writel(0x00000003, &mctl_com->mcr1_10);  in sunxi_dram_init()
329 	writel(0x00000008, &mctl_com->mcr0_11);  in sunxi_dram_init()
330 	writel(0x00000005, &mctl_com->mcr1_11);  in sunxi_dram_init()
331 	writel(0x00000008, &mctl_com->mcr0_12);  in sunxi_dram_init()
332 	writel(0x00000003, &mctl_com->mcr1_12);  in sunxi_dram_init()
333 	writel(0x00000008, &mctl_com->mcr0_13);  in sunxi_dram_init()
334 	writel(0x00000004, &mctl_com->mcr1_13);  in sunxi_dram_init()
335 	writel(0x00000008, &mctl_com->mcr0_14);  in sunxi_dram_init()
336 	writel(0x00000002, &mctl_com->mcr1_14);  in sunxi_dram_init()
337 	writel(0x00000008, &mctl_com->mcr0_15);  in sunxi_dram_init()
338 	writel(0x00000003, &mctl_com->mcr1_15);  in sunxi_dram_init()
339 	writel(0x00010138, &mctl_com->bwcr);  in sunxi_dram_init()