Lines Matching refs:MBUS_CONF
140 #define MBUS_CONF(port, bwlimit, qos, acs, bwl0, bwl1, bwl2) \ macro
153 MBUS_CONF( CPU, true, HIGHEST, 0, 256, 128, 100); in mctl_set_master_priority()
154 MBUS_CONF( GPU, true, HIGH, 0, 1536, 1400, 256); in mctl_set_master_priority()
155 MBUS_CONF( MAHB, true, HIGHEST, 0, 512, 256, 96); in mctl_set_master_priority()
156 MBUS_CONF( DMA, true, HIGH, 0, 256, 100, 80); in mctl_set_master_priority()
157 MBUS_CONF( VE, true, HIGH, 2, 8192, 5500, 5000); in mctl_set_master_priority()
158 MBUS_CONF( CE, true, HIGH, 2, 100, 64, 32); in mctl_set_master_priority()
159 MBUS_CONF( TSC0, true, HIGH, 2, 100, 64, 32); in mctl_set_master_priority()
160 MBUS_CONF(NDFC0, true, HIGH, 0, 256, 128, 64); in mctl_set_master_priority()
161 MBUS_CONF( CSI0, true, HIGH, 0, 256, 128, 100); in mctl_set_master_priority()
162 MBUS_CONF( DI0, true, HIGH, 0, 1024, 256, 64); in mctl_set_master_priority()
163 MBUS_CONF(DE300, true, HIGHEST, 6, 8192, 2800, 2400); in mctl_set_master_priority()
164 MBUS_CONF(IOMMU, true, HIGHEST, 0, 100, 64, 32); in mctl_set_master_priority()
165 MBUS_CONF( VE2, true, HIGH, 2, 8192, 5500, 5000); in mctl_set_master_priority()
166 MBUS_CONF( USB3, true, HIGH, 0, 256, 128, 64); in mctl_set_master_priority()
167 MBUS_CONF( PCIE, true, HIGH, 2, 100, 64, 32); in mctl_set_master_priority()
168 MBUS_CONF( VP9, true, HIGH, 2, 8192, 5500, 5000); in mctl_set_master_priority()
169 MBUS_CONF(HDCP2, true, HIGH, 2, 100, 64, 32); in mctl_set_master_priority()