Lines Matching +full:post +full:- +full:pwm +full:- +full:on +full:- +full:delay +full:- +full:ms
4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
87 ---help---
100 ---help---
102 as the original A10 (mach-sun4i).
106 ---help---
113 ---help---
116 not have official open-source DRAM initialization code, but can
122 ---help---
124 have only 16-bit memory buswidth.
128 ---help---
130 32-bit memory buswidth.
336 ---help---
337 Prepend a 1536 byte (empty) header to the U-Boot image file, to be
338 filled with magic values post build. The Allwinner provided boot0
339 blob relies on this information to load and execute U-Boot.
340 Only needed on 64-bit Allwinner boards so far when using boot0.
344 depends on ARM64
347 ---help---
348 Insert some ARM32 code at the very beginning of the U-Boot binary
353 This allows both the SPL and the U-Boot proper to be entered in
374 depends on !MACH_SUN8I_V3S
375 ---help---
382 ---help---
389 depends on MACH_SUN8I_V3S
390 ---help---
391 This option is only for the DDR2 memory chip which is co-packaged in
399 depends on MACH_SUN8I_A83T
401 ---help---
413 ---help---
414 Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
416 (for DDR3-1600) are 312 to 792.
422 ---help---
423 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
435 ---help---
444 ---help---
445 Select this to enable dram odt (on die termination).
452 ---help---
458 ---help---
460 the delay on the command lane and also phase shifts, which are
462 means that no phase/delay adjustments are necessary. Properly
469 ---help---
471 encodes the DQS gating delay for each byte lane. The delay
473 means that the delay is 5 quarter-cycles for one lane (1.25
474 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
476 autodetection are not very reliable and depend on the chip
477 temperature (sometimes producing different results on cold start
485 ---help---
490 ---help---
494 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
495 ---help---
496 Use the timings of the standard JEDEC DDR3-1066F speed bin for
497 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
499 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
500 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
501 that down binning to DDR3-1066F is supported (because DDR3-1066F
502 uses a bit faster timings than DDR3-1333H).
505 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
506 ---help---
508 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
509 DDR3-800E, DDR3-1066G or DDR3-1333J.
519 ---help---
520 Set the dram odt correction value (range -255 - 255). In allwinner
521 fex files, this option is found in bits 8-15 of the u32 odt_en variable
553 bool "UART0 on MicroSD breakout board"
555 ---help---
557 console. Primarily useful only for low level u-boot debugging on
566 ---help---
568 sub-optimal settings for newer kernels, only enable if needed.
581 ---help---
589 ---help---
595 ---help---
601 ---help---
607 ---help---
614 ---help---
620 ---help---
625 default -1
626 ---help---
628 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
632 int "delay initial usb scan by x ms to allow builtin devices to init"
634 ---help---
635 Some boards have on board usb devices which need longer than the
637 option to a non 0 value to add an extra delay before the first usb
643 ---help---
650 ---help---
657 ---help---
665 ---help---
674 ---help---
680 ---help---
688 ---help---
690 its clock and setting up the bus. This is especially useful on devices
698 ---help---
705 ---help---
713 ---help---
720 # This is used for the pmic on H3
723 ---help---
732 ---help---
737 bool "Enable support for gpio-s on axp PMICs"
739 ---help---
743 bool "Enable graphical uboot console on HDMI, LCD or VGA"
744 depends on !MACH_SUN8I_A83T
745 depends on !MACH_SUNXI_H3_H5
746 depends on !MACH_SUN8I_R40
747 depends on !MACH_SUN8I_V3S
748 depends on !MACH_SUN9I
749 depends on !MACH_SUN50I
750 depends on !MACH_SUN50I_H6
754 ---help---
755 Say Y here to add support for using a cfb console on the HDMI, LCD
756 or VGA output found on most sunxi devices. See doc/README.video for
757 info on how to select the video output and mode.
761 depends on VIDEO_SUNXI && !MACH_SUN8I
763 ---help---
768 depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN7I)
770 ---help---
775 depends on VIDEO_SUNXI && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
777 ---help---
779 LCD interface driving a VGA connector, such as found on the
784 depends on VIDEO_VGA_VIA_LCD
786 ---help---
789 positive edges for a stable video output, so on boards with opendrain
794 depends on VIDEO_VGA_VIA_LCD
796 ---help---
802 depends on VIDEO_SUNXI && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
804 ---help---
809 depends on VIDEO_SUNXI
811 ---help---
815 Also see: http://linux-sunxi.org/LCD
819 depends on VIDEO_SUNXI || DM_VIDEO
821 ---help---
822 Select LCD panel display clock phase shift, range 0-3.
826 depends on VIDEO_SUNXI
828 ---help---
834 depends on VIDEO_SUNXI
836 ---help---
842 depends on VIDEO_SUNXI
844 ---help---
850 string "LCD panel backlight pwm pin"
851 depends on VIDEO_SUNXI
853 ---help---
854 Set the backlight pwm pin for the LCD panel. This takes a string in the
858 bool "LCD panel backlight pwm is inverted"
859 depends on VIDEO_SUNXI
861 ---help---
862 Set this if the backlight pwm output is active low.
866 depends on VIDEO_SUNXI
869 ---help---
875 depends on VIDEO_LCD_PANEL_I2C
877 ---help---
883 depends on VIDEO_LCD_PANEL_I2C
885 ---help---
904 depends on SUNXI_DE2
909 ---help---
910 Say y here if you want to build DE2 video driver which is present on
916 depends on VIDEO_SUNXI
917 ---help---
929 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
932 ---help---
936 bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
940 ---help---
948 ---help---
955 ---help---
956 6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
970 int "GMAC Transmit Clock Delay Chain"
972 ---help---
973 Set the GMAC Transmit Clock Delay Chain value.
986 bool "Support for SPI Flash on Allwinner SoCs in SPL"
987 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
995 depends on MACH_SUN50I