arm/mach-socfpga/system_manager_s10.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
26  * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
27  * The value is not wrote to SYSMGR.FPGAINTF.MODULE but
35 	if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
37 	if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
39 	if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
41 	if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
43 	writel(handoff_val, &sysmgr_regs->fpgaintf_en_2);  in populate_sysmgr_fpgaintf_module()
46 	if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
48 	if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
50 	if (readl(&sysmgr_regs->rgmii2usefpga) == SYSMGR_FPGAINTF_USEFPGA)  in populate_sysmgr_fpgaintf_module()
52 	writel(handoff_val, &sysmgr_regs->fpgaintf_en_3);  in populate_sysmgr_fpgaintf_module()
67 		       sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->pinsel0[0]);  in populate_sysmgr_pinmux()
70 	/* setup the pin ctrl */  in populate_sysmgr_pinmux()
74 		       sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->ioctrl0[0]);  in populate_sysmgr_pinmux()
82 		       (u8 *)&sysmgr_regs->rgmii0usefpga);  in populate_sysmgr_pinmux()
89 		       sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->iodelay0[0]);  in populate_sysmgr_pinmux()