arm/mach-socfpga/reset_manager_s10.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
11 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
20 /* Assert or de-assert SoCFPGA reset manager reset. */
26 		reg = &reset_manager_base->mpumodrst;  in socfpga_per_reset()
28 		reg = &reset_manager_base->per0modrst;  in socfpga_per_reset()
30 		reg = &reset_manager_base->per1modrst;  in socfpga_per_reset()
32 		reg = &reset_manager_base->brgmodrst;  in socfpga_per_reset()
43  * Assert reset on every peripheral but L4WD0.
53 	       &reset_manager_base->per0modrst);  in socfpga_per_reset_all()
54 	writel(~l4wd0, &reset_manager_base->per0modrst);  in socfpga_per_reset_all()
55 	writel(0xffffffff, &reset_manager_base->per1modrst);  in socfpga_per_reset_all()
62 		setbits_le32(&system_manager_base->noc_idlereq_clr, ~0);  in socfpga_bridges_reset()
65 		clrbits_le32(&reset_manager_base->brgmodrst, ~0);  in socfpga_bridges_reset()
68 		while (readl(&system_manager_base->noc_idleack))  in socfpga_bridges_reset()
72 		writel(~0, &system_manager_base->noc_idlereq_set);  in socfpga_bridges_reset()
75 		writel(1, &system_manager_base->noc_timeout);  in socfpga_bridges_reset()
78 		while ((readl(&system_manager_base->noc_idleack) ^  in socfpga_bridges_reset()
83 		while ((readl(&system_manager_base->noc_idlestatus) ^  in socfpga_bridges_reset()
88 		setbits_le32(&reset_manager_base->brgmodrst,  in socfpga_bridges_reset()
92 		writel(0, &system_manager_base->noc_timeout);  in socfpga_bridges_reset()
101 	writel(0, &reset_manager_base->per1modrst);  in reset_deassert_peripherals_handoff()
103 	writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst);  in reset_deassert_peripherals_handoff()
104 	writel(0, &reset_manager_base->per0modrst);  in reset_deassert_peripherals_handoff()