arm/mach-socfpga/misc_s10.c

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
20 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
37 		-1,
57 		return -EINVAL;  in socfpga_phymode_setup()
67 		return -EINVAL;  in socfpga_phymode_setup()
69 	clrsetbits_le32(&sysmgr_regs->emac0 + gmac_index,  in socfpga_phymode_setup()
78 	const void *fdt = gd->fdt_blob;  in socfpga_set_phymode()
84 	int i, node;  in socfpga_set_phymode()  local
90 		node = nodes[i];  in socfpga_set_phymode()
91 		if (node <= 0)  in socfpga_set_phymode()
94 		ret = fdtdec_parse_phandle_with_args(fdt, node, "resets",  in socfpga_set_phymode()
95 						     "#reset-cells", 1, 0,  in socfpga_set_phymode()
98 			debug("GMAC%i: Failed to parse DT 'resets'!\n", i);  in socfpga_set_phymode()
102 		gmac_index = args.args[0] - EMAC0_RESET;  in socfpga_set_phymode()
104 		phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL);  in socfpga_set_phymode()
107 			debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i);  in socfpga_set_phymode()
127 	puts("CPU:   Intel FPGA SoCFPGA Platform (ARMv8 64bit Cortex-A53)\n");  in print_cpuinfo()