Lines Matching +full:nand +full:- +full:cache
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
33 { "nand", "NAND Flash (1.8V)", },
34 { "nand", "NAND Flash (3.0V)", },
44 return -EINVAL; in dram_init()
62 /* Disable the L2 cache */ in v7_outer_cache_enable()
63 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
65 writel(0x0, &pl310->pl310_tag_latency_ctrl); in v7_outer_cache_enable()
66 writel(0x10, &pl310->pl310_data_latency_ctrl); in v7_outer_cache_enable()
69 setbits_le32(&pl310->pl310_aux_ctrl, in v7_outer_cache_enable()
74 /* Enable the L2 cache */ in v7_outer_cache_enable()
75 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
80 /* Disable the L2 cache */ in v7_outer_cache_disable()
81 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()
106 * In case the watchdog is enabled, make sure to (re-)configure it in arch_cpu_init()
116 * trigger a watchdog-triggered reboot of Linux kernel later. in arch_cpu_init()
150 "enable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"
151 "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n"