1 // SPDX-License-Identifier: GPL-2.0+
33 	writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW,	&freeze_controller_base->src);  in sys_mgr_frzctrl_freeze_req()
38 			&freeze_controller_base->vioctrl + channel_id);  in sys_mgr_frzctrl_freeze_req()
41 		 * Assert active low enrnsl, plniotri  in sys_mgr_frzctrl_freeze_req()
52 		 * Assert active low bhniotri signal and de-assert  in sys_mgr_frzctrl_freeze_req()
53 		 * active high csrdone  in sys_mgr_frzctrl_freeze_req()
66 	 * Assert active low enrnsl, plniotri and  in sys_mgr_frzctrl_freeze_req()
73 	clrbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask);  in sys_mgr_frzctrl_freeze_req()
76 	 * assert active low bhniotri & nfrzdrv signals,  in sys_mgr_frzctrl_freeze_req()
77 	 * de-assert active high csrdone and assert  in sys_mgr_frzctrl_freeze_req()
78 	 * active high frzreg and nfrzdrv signals  in sys_mgr_frzctrl_freeze_req()
80 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
88 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
91 	 * assert active high reinit signal and de-assert  in sys_mgr_frzctrl_freeze_req()
92 	 * active high pllbiasen signals  in sys_mgr_frzctrl_freeze_req()
94 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
99 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_freeze_req()
115 	writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW,	&freeze_controller_base->src);  in sys_mgr_frzctrl_thaw_req()
120 			= (u32)(&freeze_controller_base->vioctrl + channel_id);  in sys_mgr_frzctrl_thaw_req()
123 		 * Assert active low bhniotri signal and  in sys_mgr_frzctrl_thaw_req()
124 		 * de-assert active high csrdone  in sys_mgr_frzctrl_thaw_req()
133 		 * de-assert active low plniotri and niotri signals  in sys_mgr_frzctrl_thaw_req()
142 		 * de-assert active low enrnsl signal  in sys_mgr_frzctrl_thaw_req()
152 	/* de-assert active high reinit signal */  in sys_mgr_frzctrl_thaw_req()
153 	clrbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
158 	 * assert active high pllbiasen signals  in sys_mgr_frzctrl_thaw_req()
160 	setbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
168 	 * de-assert active low bhniotri signals,  in sys_mgr_frzctrl_thaw_req()
169 	 * assert active high csrdone and nfrzdrv signal  in sys_mgr_frzctrl_thaw_req()
171 	reg_value = readl(&freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_thaw_req()
176 	writel(reg_value, &freeze_controller_base->hioctrl);  in sys_mgr_frzctrl_thaw_req()
185 	/* de-assert active low plniotri and niotri signals */  in sys_mgr_frzctrl_thaw_req()
190 	setbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask);  in sys_mgr_frzctrl_thaw_req()
194 	 * de-assert active high frzreg signal  in sys_mgr_frzctrl_thaw_req()
196 	clrbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()
201 	 * de-assert active low enrnsl signal  in sys_mgr_frzctrl_thaw_req()
203 	setbits_le32(&freeze_controller_base->hioctrl,  in sys_mgr_frzctrl_thaw_req()