82 		readl(&clock_manager_base->per_pll.en),  in cm_basic_init()
83 		&clock_manager_base->per_pll.en);  in cm_basic_init()
97 	writel(0, &clock_manager_base->per_pll.en);  in cm_basic_init()
109 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
122 	       &clock_manager_base->per_pll.src);  in cm_basic_init()
128 	readl(&clock_manager_base->per_pll.vco);  in cm_basic_init()
137 	writel(cfg->peri_vco_base, &clock_manager_base->per_pll.vco);  in cm_basic_init()
163 	writel(cfg->emac0clk, &clock_manager_base->per_pll.emac0clk);  in cm_basic_init()
166 	writel(cfg->emac1clk, &clock_manager_base->per_pll.emac1clk);  in cm_basic_init()
171 	writel(cfg->perqspiclk, &clock_manager_base->per_pll.perqspiclk);  in cm_basic_init()
178 	       &clock_manager_base->per_pll.pernandsdmmcclk);  in cm_basic_init()
181 	writel(cfg->perbaseclk, &clock_manager_base->per_pll.perbaseclk);  in cm_basic_init()
184 	writel(cfg->s2fuser1clk, &clock_manager_base->per_pll.s2fuser1clk);  in cm_basic_init()
197 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
211 	writel(cfg->perdiv, &clock_manager_base->per_pll.div);  in cm_basic_init()
213 	writel(cfg->gpiodiv, &clock_manager_base->per_pll.gpiodiv);  in cm_basic_init()
240 	u32 periphvco = readl(&clock_manager_base->per_pll.vco);  in cm_basic_init()
244 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
257 	       &clock_manager_base->per_pll.vco);  in cm_basic_init()
302 	writel(cfg->persrc, &clock_manager_base->per_pll.src);  in cm_basic_init()
307 	writel(~0, &clock_manager_base->per_pll.en);  in cm_basic_init()
338 	reg = readl(&clock_manager_base->per_pll.vco);  in cm_get_per_vco_clk_hz()
349 	reg = readl(&clock_manager_base->per_pll.vco);  in cm_get_per_vco_clk_hz()
424 		reg = readl(&clock_manager_base->per_pll.perbaseclk);  in cm_get_l4_sp_clk_hz()
442 	reg = readl(&clock_manager_base->per_pll.src);  in cm_get_mmc_controller_clk_hz()
458 		reg = readl(&clock_manager_base->per_pll.pernandsdmmcclk);  in cm_get_mmc_controller_clk_hz()
472 	reg = readl(&clock_manager_base->per_pll.src);  in cm_get_qspi_controller_clk_hz()
488 		reg = readl(&clock_manager_base->per_pll.perqspiclk);  in cm_get_qspi_controller_clk_hz()
502 	reg = readl(&clock_manager_base->per_pll.perbaseclk);  in cm_get_spi_controller_clk_hz()