Lines Matching refs:dpll_params

31 static const struct dpll_params mpu_dpll_params_800mhz[NUM_SYS_CLKS] = {
42 static const struct dpll_params mpu_dpll_params_1ghz[NUM_SYS_CLKS] = {
52 static const struct dpll_params
63 static const struct dpll_params
74 static const struct dpll_params
85 static const struct dpll_params per_dpll_params_768mhz[NUM_SYS_CLKS] = {
95 static const struct dpll_params per_dpll_params_768mhz_es2[NUM_SYS_CLKS] = {
105 static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
115 static const struct dpll_params per_dpll_params_768mhz_dra76x[NUM_SYS_CLKS] = {
125 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {
135 static const struct dpll_params iva_dpll_params_2330mhz_dra7xx[NUM_SYS_CLKS] = {
147 static const struct dpll_params
161 static const struct dpll_params abe_dpll_params_32k_196608khz = {
167 static const struct dpll_params
178 static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = {
188 static const struct dpll_params ddr_dpll_params_2664mhz[NUM_SYS_CLKS] = {
198 static const struct dpll_params ddr_dpll_params_2128mhz[NUM_SYS_CLKS] = {
208 static const struct dpll_params gmac_dpll_params_2000mhz[NUM_SYS_CLKS] = {