40 	if (readl(&sdrc_base->cs[CS0].mr) == SDRC_MR_0_SDR)  in is_mem_sdr()
47  * - When we have CS1 populated we want to have it mapped after cs0 to allow
55 	size = get_sdr_cs_size(CS0);  in make_cs1_contiguous()
81  *  - Get offset of cs from cs0 start
125  *  - Code called once in C-Stack only context for CS0 and with early being
145 	 * from the first bank to the second.  We will setup CS0,  in do_sdrc_init()
170 		write_sdrc_timings(CS0, sdrc_actim_base0, &timings);  in do_sdrc_init()
180 	 * both CS0 and CS1 (such as some older versions of x-loader)  in do_sdrc_init()
184 		timings.mcfg = readl(&sdrc_base->cs[CS0].mcfg),  in do_sdrc_init()
185 		timings.rfr_ctrl = readl(&sdrc_base->cs[CS0].rfr_ctrl);  in do_sdrc_init()
188 		timings.mr = readl(&sdrc_base->cs[CS0].mr);  in do_sdrc_init()
201 	size0 = get_sdr_cs_size(CS0);  in dram_init()
206 	 * configured correctly.  CS0 will already have been setup  in dram_init()
222 	size0 = get_sdr_cs_size(CS0);  in dram_init_banksize()
236  *  - Selects CS0 and CS1,
241 	do_sdrc_init(CS0, EARLY_INIT);  in mem_init()