Lines Matching refs:ddr_pll_ctrl
240 u32 ddr_pll_ctrl = 0; in ddr_pll_bypass_ti816x() local
243 ddr_pll_ctrl = readl(&cmpll->ddrpll_ctrl); in ddr_pll_bypass_ti816x()
244 ddr_pll_ctrl &= 0xFFFFFFFB; in ddr_pll_bypass_ti816x()
245 ddr_pll_ctrl |= BIT(2); in ddr_pll_bypass_ti816x()
246 writel(ddr_pll_ctrl, &cmpll->ddrpll_ctrl); in ddr_pll_bypass_ti816x()
251 u32 ddr_pll_ctrl = 0; in ddr_pll_init_ti816x() local
253 ddr_pll_ctrl = readl(&cmpll->ddrpll_ctrl); in ddr_pll_init_ti816x()
254 ddr_pll_ctrl &= 0xFFFFFFF7; in ddr_pll_init_ti816x()
255 ddr_pll_ctrl |= BIT(3); in ddr_pll_init_ti816x()
256 writel(ddr_pll_ctrl, &cmpll->ddrpll_ctrl); in ddr_pll_init_ti816x()
259 ddr_pll_ctrl = readl(&cmpll->ddrpll_ctrl); in ddr_pll_init_ti816x()
260 ddr_pll_ctrl &= 0xFF; in ddr_pll_init_ti816x()
261 ddr_pll_ctrl |= (DDR_N<<16 | DDR_P<<8); in ddr_pll_init_ti816x()
262 writel(ddr_pll_ctrl, &cmpll->ddrpll_ctrl); in ddr_pll_init_ti816x()