Lines Matching +full:keep +full:- +full:pll +full:- +full:enabled
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
41 writel(readl(®->rstoutn_mask) | 1, ®->rstoutn_mask); in reset_cpu()
42 writel(readl(®->sys_soft_rst) | 1, ®->sys_soft_rst); in reset_cpu()
148 val = readl(CONFIG_SAR2_REG); /* SAR - Sample At Reset */ in get_sar_freq()
150 val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ in get_sar_freq()
184 *sar_freq = sar_freq_tab[i - 1]; in get_sar_freq()
197 puts("MV78230-"); in print_cpuinfo()
200 puts("MV78260-"); in print_cpuinfo()
203 puts("MV78460-"); in print_cpuinfo()
206 puts("MV88F6720-"); in print_cpuinfo()
209 puts("MV88F6810-"); in print_cpuinfo()
212 puts("MV88F6820-"); in print_cpuinfo()
215 puts("MV88F6828-"); in print_cpuinfo()
218 puts("98DX3236-"); in print_cpuinfo()
221 puts("98DX3336-"); in print_cpuinfo()
224 puts("98DX4251-"); in print_cpuinfo()
227 puts("Unknown-"); in print_cpuinfo()
287 * main payload (U-Boot) is executed.
317 * leads to overlapping enabled windows with in update_sdram_window_sizes()
351 * USB PLL init in setup_usb_phys()
354 /* Setup PLL frequency */ in setup_usb_phys()
358 /* Power up PLL and PHY channel */ in setup_usb_phys()
381 * This function is not called from the SPL U-Boot version
403 * in the macros / defines in the U-Boot header (soc.h). in arch_cpu_init()
413 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in arch_cpu_init()
420 * required for U-Boot. Calling update_sdram_window_sizes() in arch_cpu_init()
455 /* Configure USB PLL and PHYs on AXP */ in arch_cpu_init()
525 for (i = 0; i < dram->num_cs; i++) { in ahci_mvebu_mbus_config()
526 const struct mbus_dram_window *cs = dram->cs + i; in ahci_mvebu_mbus_config()
528 writel((cs->mbus_attr << 8) | in ahci_mvebu_mbus_config()
529 (dram->mbus_dram_target_id << 4) | 1, in ahci_mvebu_mbus_config()
531 writel(cs->base >> 16, base + AHCI_WINDOW_BASE(i)); in ahci_mvebu_mbus_config()
532 writel(((cs->size - 1) & 0xffff0000), in ahci_mvebu_mbus_config()
572 for (i = 0; i < dram->num_cs; i++) { in xhci_mvebu_mbus_config()
573 const struct mbus_dram_window *cs = dram->cs + i; in xhci_mvebu_mbus_config()
576 writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | in xhci_mvebu_mbus_config()
577 (dram->mbus_dram_target_id << 4) | 1, in xhci_mvebu_mbus_config()
581 writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(i)); in xhci_mvebu_mbus_config()
604 * Armada 375 still has some problems with d-cache enabled in the in enable_caches()
605 * ethernet driver (mvpp2). So lets keep the d-cache disabled in enable_caches()
609 /* Enable D-cache. I-cache is already enabled in start.S */ in enable_caches()
634 setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
643 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_disable()