23 #define PSC_REG_PDSTAT(x)       (0x200 + (4 * (x)))  argument
24 #define PSC_REG_PDCTL(x)        (0x300 + (4 * (x)))  argument
25 #define PSC_REG_MDCFG(x)        (0x600 + (4 * (x)))  argument
26 #define PSC_REG_MDSTAT(x)       (0x800 + (4 * (x)))  argument
27 #define PSC_REG_MDCTL(x)        (0xa00 + (4 * (x)))  argument
30 static inline u32 _boot_bit_mask(u32 x, u32 y)  in _boot_bit_mask()
36 static inline u32 boot_read_bitfield(u32 z, u32 x, u32 y)  in boot_read_bitfield()
42 static inline u32 boot_set_bitfield(u32 z, u32 f, u32 x, u32 y)  in boot_set_bitfield()
50 #define PSC_REG_PDCTL_SET_NEXT(x, y)        boot_set_bitfield((x), (y), 0, 0)  argument
51 #define PSC_REG_PDCTL_SET_PDMODE(x, y)      boot_set_bitfield((x), (y), 15, 12)  argument
54 #define PSC_REG_PDSTAT_GET_STATE(x)         boot_read_bitfield((x), 4, 0)  argument
57 #define PSC_REG_MDCFG_GET_PD(x)             boot_read_bitfield((x), 20, 16)  argument
58 #define PSC_REG_MDCFG_GET_RESET_ISO(x)      boot_read_bitfield((x), 14, 14)  argument
61 #define PSC_REG_MDCTL_SET_NEXT(x, y)        boot_set_bitfield((x), (y), 4, 0)  argument
62 #define PSC_REG_MDCTL_SET_LRSTZ(x, y)       boot_set_bitfield((x), (y), 8, 8)  argument
63 #define PSC_REG_MDCTL_GET_LRSTZ(x)          boot_read_bitfield((x), 8, 8)  argument
64 #define PSC_REG_MDCTL_SET_RESET_ISO(x, y)   boot_set_bitfield((x), (y), \  argument
68 #define PSC_REG_MDSTAT_GET_STATUS(x)        boot_read_bitfield((x), 5, 0)  argument
69 #define PSC_REG_MDSTAT_GET_LRSTZ(x)         boot_read_bitfield((x), 8, 8)  argument
70 #define PSC_REG_MDSTAT_GET_LRSTDONE(x)      boot_read_bitfield((x), 9, 9)  argument
71 #define PSC_REG_MDSTAT_GET_MRSTZ(x)         boot_read_bitfield((x), 10, 10)  argument
72 #define PSC_REG_MDSTAT_GET_MRSTDONE(x)      boot_read_bitfield((x), 11, 11)  argument