83 	u32 reg, val;  in pcc_clock_enable()  local
90 	val = readl(reg);  in pcc_clock_enable()
92 	clk_debug("pcc_clock_enable: clk %d, reg 0x%x, val 0x%x, enable %d\n",  in pcc_clock_enable()
93 		  clk, reg, val, enable);  in pcc_clock_enable()
95 	if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK))  in pcc_clock_enable()
99 		val |= PCC_CGC_MASK;  in pcc_clock_enable()
101 		val &= ~PCC_CGC_MASK;  in pcc_clock_enable()
103 	writel(val, reg);  in pcc_clock_enable()
105 	clk_debug("pcc_clock_enable: val 0x%x\n", val);  in pcc_clock_enable()
113 	u32 reg, val, i, clksrc_type;  in pcc_clock_sel()  local
139 	val = readl(reg);  in pcc_clock_sel()
141 	clk_debug("pcc_clock_sel: clk %d, reg 0x%x, val 0x%x, clksrc_type %d\n",  in pcc_clock_sel()
142 		  clk, reg, val, clksrc_type);  in pcc_clock_sel()
144 	if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK) ||  in pcc_clock_sel()
145 	    (val & PCC_CGC_MASK)) {  in pcc_clock_sel()
146 		printf("Not permit to select clock source val = 0x%x\n", val);  in pcc_clock_sel()
150 	val &= ~PCC_PCS_MASK;  in pcc_clock_sel()
151 	val |= ((i + 1) << PCC_PCS_OFFSET);  in pcc_clock_sel()
153 	writel(val, reg);  in pcc_clock_sel()
155 	clk_debug("pcc_clock_sel: val 0x%x\n", val);  in pcc_clock_sel()
162 	u32 reg, val;  in pcc_clock_div_config()  local
175 	val = readl(reg);  in pcc_clock_div_config()
177 	if (!(val & PCC_PR_MASK) || (val & PCC_INUSE_MASK) ||  in pcc_clock_div_config()
178 	    (val & PCC_CGC_MASK)) {  in pcc_clock_div_config()
179 		printf("Not permit to set div/frac val = 0x%x\n", val);  in pcc_clock_div_config()
184 		val |= PCC_FRAC_MASK;  in pcc_clock_div_config()
186 		val &= ~PCC_FRAC_MASK;  in pcc_clock_div_config()
188 	val &= ~PCC_PCD_MASK;  in pcc_clock_div_config()
189 	val |= (div - 1) & PCC_PCD_MASK;  in pcc_clock_div_config()
191 	writel(val, reg);  in pcc_clock_div_config()
198 	u32 reg, val;  in pcc_clock_is_enable()  local
204 	val = readl(reg);  in pcc_clock_is_enable()
206 	if ((val & PCC_INUSE_MASK) || (val & PCC_CGC_MASK))  in pcc_clock_is_enable()
214 	u32 reg, val, clksrc_type;  in pcc_clock_get_clksrc()  local
228 	val = readl(reg);  in pcc_clock_get_clksrc()
230 	clk_debug("pcc_clock_get_clksrc: clk %d, reg 0x%x, val 0x%x, type %d\n",  in pcc_clock_get_clksrc()
231 		  clk, reg, val, clksrc_type);  in pcc_clock_get_clksrc()
233 	if (!(val & PCC_PR_MASK)) {  in pcc_clock_get_clksrc()
234 		printf("This pcc slot is not present = 0x%x\n", val);  in pcc_clock_get_clksrc()
238 	val &= PCC_PCS_MASK;  in pcc_clock_get_clksrc()
239 	val = (val >> PCC_PCS_OFFSET);  in pcc_clock_get_clksrc()
241 	if (!val) {  in pcc_clock_get_clksrc()
246 	*src = pcc_clksrc[clksrc_type][val - 1];  in pcc_clock_get_clksrc()
255 	u32 reg, val, rate, frac, div;  in pcc_clock_get_rate()  local
269 		val = readl(reg);  in pcc_clock_get_rate()
271 		frac = (val & PCC_FRAC_MASK) >> PCC_FRAC_OFFSET;  in pcc_clock_get_rate()
272 		div = (val & PCC_PCD_MASK) >> PCC_PCD_OFFSET;  in pcc_clock_get_rate()