378 	struct clk_root_map *p = root_array;  in select()  local
382 	for (i = 0; i < size; i++, p++) {  in select()
383 		if (clock_id == p->entry)  in select()
393 	struct clk_root_map *p = &root_array[entry];  in src_supported()  local
395 	if ((p->type == CCM_DRAM_PHYM_CHANNEL) || (p->type == CCM_DRAM_CHANNEL))  in src_supported()
401 		if (p->src_mux[i] == clock_src)  in src_supported()
438 	struct clk_root_map *p;  in clock_get_src()  local
451 	p = &root_array[root_entry];  in clock_get_src()
452 	*p_clock_src = p->src_mux[val];  in clock_get_src()
460 	struct clk_root_map *p;  in clock_set_prediv()  local
470 	p = &root_array[root_entry];  in clock_set_prediv()
472 	if ((p->type == CCM_CORE_CHANNEL) ||  in clock_set_prediv()
473 	    (p->type == CCM_DRAM_PHYM_CHANNEL) ||  in clock_set_prediv()
474 	    (p->type == CCM_DRAM_CHANNEL)) {  in clock_set_prediv()
493 	struct clk_root_map *p;  in clock_get_prediv()  local
502 	p = &root_array[root_entry];  in clock_get_prediv()
504 	if ((p->type == CCM_CORE_CHANNEL) ||  in clock_get_prediv()
505 	    (p->type == CCM_DRAM_PHYM_CHANNEL) ||  in clock_get_prediv()
506 	    (p->type == CCM_DRAM_CHANNEL)) {  in clock_get_prediv()
577 	struct clk_root_map *p;  in clock_set_autopostdiv()  local
586 	p = &root_array[root_entry];  in clock_set_autopostdiv()
588 	if ((p->type != CCM_BUS_CHANNEL) && (p->type != CCM_AHB_CHANNEL)) {  in clock_set_autopostdiv()
615 	struct clk_root_map *p;  in clock_get_autopostdiv()  local
624 	p = &root_array[root_entry];  in clock_get_autopostdiv()
630 	if ((p->type != CCM_BUS_CHANNEL) && (p->type != CCM_AHB_CHANNEL)) {  in clock_get_autopostdiv()
676 	struct clk_root_map *p;  in clock_root_cfg()  local
685 	p = &root_array[root_entry];  in clock_root_cfg()
687 	if ((p->type == CCM_CORE_CHANNEL) ||  in clock_root_cfg()
688 	    (p->type == CCM_DRAM_PHYM_CHANNEL) ||  in clock_root_cfg()
689 	    (p->type == CCM_DRAM_CHANNEL)) {  in clock_root_cfg()
697 	if (p->type == CCM_DRAM_CHANNEL) {  in clock_root_cfg()
704 	if (p->type == CCM_DRAM_PHYM_CHANNEL) {  in clock_root_cfg()