Lines Matching +full:100 +full:mhz
352 * LCDIF_PIXEL_CLK: select 800MHz root clock, in mxs_set_lcdclk()
353 * select pre divider 8, output is 100 MHz in mxs_set_lcdclk()
383 /* 500MHz */ in init_usb_clk()
386 /* 100MHz */ in init_usb_clk()
389 /* 100MHz */ in init_usb_clk()
464 * sys pll1 100M in set_clk_qspi()
498 /* set enet axi clock 266Mhz */ in set_clk_enet()
529 DRAM_BYPASS_ROOT_CONFIG(MHZ(100), 2, CLK_ROOT_PRE_DIV1, 2,
531 DRAM_BYPASS_ROOT_CONFIG(MHZ(250), 3, CLK_ROOT_PRE_DIV2, 2,
533 DRAM_BYPASS_ROOT_CONFIG(MHZ(400), 1, CLK_ROOT_PRE_DIV2, 3,
585 case MHZ(800): in dram_pll_init()
597 case MHZ(600): in dram_pll_init()
609 case MHZ(400): in dram_pll_init()
621 case MHZ(167): in dram_pll_init()
644 __udelay(100); in dram_pll_init()
704 /* 800MHz */ in sscg_pll_init()
719 /* 1000MHz */ in sscg_pll_init()
734 /* 800MHz */ in sscg_pll_init()
773 * We set ARM clock to 1Ghz for consumer, 800Mhz for industrial in clock_init()
789 * sys pll1 fixed at 800MHz in clock_init()
825 printf("ARM_PLL %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
827 printf("SYS_PLL1_800 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
829 printf("SYS_PLL1_400 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
831 printf("SYS_PLL1_266 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
833 printf("SYS_PLL1_200 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
835 printf("SYS_PLL1_160 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
837 printf("SYS_PLL1_133 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
839 printf("SYS_PLL1_100 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
841 printf("SYS_PLL1_80 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
843 printf("SYS_PLL1_40 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
845 printf("SYS_PLL2_1000 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
847 printf("SYS_PLL2_500 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
849 printf("SYS_PLL2_333 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
851 printf("SYS_PLL2_250 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
853 printf("SYS_PLL2_200 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
855 printf("SYS_PLL2_166 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
857 printf("SYS_PLL2_125 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
859 printf("SYS_PLL2_100 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
861 printf("SYS_PLL2_50 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
863 printf("SYS_PLL3 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
865 printf("UART1 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
867 printf("USDHC1 %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()
869 printf("QSPI %8d MHz\n", freq / 1000000); in do_imx8m_showclocks()