110 	while (!(readl(&ddrmr->cr[94]) & DDRMC_CR94_SWLVL_OP_DONE))
113 	do { clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SWLVL_LOAD, \
117 	do { clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SWLVL_START, \
121 	do { clrsetbits_le32(&ddrmr->cr[94], DDRMC_CR94_SWLVL_EXIT, \
144 		(readl(&ddrmr->cr[105]) >> DDRMC_CR105_RDLVL_DL_0_OFF) & 0xFFFF;  in ddrmc_cal_dqs_to_dq()
145 	u16 rdlvl_dl_1_def = readl(&ddrmr->cr[110]) & 0xFFFF;  in ddrmc_cal_dqs_to_dq()
158 	writel(0x40703030, &ddrmr->cr[144]);  in ddrmc_cal_dqs_to_dq()
159 	writel(0x40, &ddrmr->cr[145]);  in ddrmc_cal_dqs_to_dq()
160 	writel(0x40, &ddrmr->cr[146]);  in ddrmc_cal_dqs_to_dq()
162 	tmp = readl(&ddrmr->cr[144]);  in ddrmc_cal_dqs_to_dq()
168 	tmp = readl(&ddrmr->cr[145]);  in ddrmc_cal_dqs_to_dq()
171 	tmp = readl(&ddrmr->cr[146]);  in ddrmc_cal_dqs_to_dq()
180 	clrbits_le32(&ddrmr->cr[101], DDRMC_CR101_PHY_RDLVL_EDGE);  in ddrmc_cal_dqs_to_dq()
182 	tmp = readl(&ddrmr->cr[101]);  in ddrmc_cal_dqs_to_dq()
187 	clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SW_LVL_MODE(0x3),  in ddrmc_cal_dqs_to_dq()
189 	tmp = readl(&ddrmr->cr[93]);  in ddrmc_cal_dqs_to_dq()
209 		clrsetbits_le32(&ddrmr->cr[105],  in ddrmc_cal_dqs_to_dq()
225 		swlvl_rsp = (readl(&ddrmr->cr[94]) >>  in ddrmc_cal_dqs_to_dq()
261 		clrsetbits_le32(&ddrmr->cr[110],  in ddrmc_cal_dqs_to_dq()
277 		swlvl_rsp = (readl(&ddrmr->cr[95]) >>  in ddrmc_cal_dqs_to_dq()
313 	writel(DDRMC_CR105_RDLVL_DL_0(rdlvl_dl_0), &ddrmr->cr[105]);  in ddrmc_cal_dqs_to_dq()
314 	writel(DDRMC_CR110_RDLVL_DL_1(rdlvl_dl_1), &ddrmr->cr[110]);  in ddrmc_cal_dqs_to_dq()