Lines Matching defs:exynos4x12_clock
239 struct exynos4x12_clock { struct
240 unsigned char res1[0x4200];
241 unsigned int src_leftbus;
242 unsigned char res2[0x1fc];
243 unsigned int mux_stat_leftbus;
244 unsigned char res3[0xfc];
245 unsigned int div_leftbus;
246 unsigned char res4[0xfc];
247 unsigned int div_stat_leftbus;
248 unsigned char res5[0x1fc];
249 unsigned int gate_ip_leftbus;
250 unsigned char res6[0x12c];
251 unsigned int gate_ip_image;
252 unsigned char res7[0xcc];
253 unsigned int clkout_leftbus;
254 unsigned int clkout_leftbus_div_stat;
255 unsigned char res8[0x37f8];
256 unsigned int src_rightbus;
257 unsigned char res9[0x1fc];
258 unsigned int mux_stat_rightbus;
259 unsigned char res10[0xfc];
260 unsigned int div_rightbus;
261 unsigned char res11[0xfc];
262 unsigned int div_stat_rightbus;
263 unsigned char res12[0x1fc];
264 unsigned int gate_ip_rightbus;
265 unsigned char res13[0x15c];
266 unsigned int gate_ip_perir;
267 unsigned char res14[0x9c];
268 unsigned int clkout_rightbus;
269 unsigned int clkout_rightbus_div_stat;
270 unsigned char res15[0x3608];
271 unsigned int epll_lock;
272 unsigned char res16[0xc];
273 unsigned int vpll_lock;
274 unsigned char res17[0xec];
275 unsigned int epll_con0;
276 unsigned int epll_con1;
277 unsigned int epll_con2;
278 unsigned char res18[0x4];
279 unsigned int vpll_con0;
280 unsigned int vpll_con1;
281 unsigned int vpll_con2;
282 unsigned char res19[0xe4];
283 unsigned int src_top0;
284 unsigned int src_top1;
285 unsigned char res20[0x8];
286 unsigned int src_cam;
287 unsigned int src_tv;
288 unsigned int src_mfc;
289 unsigned int src_g3d;
290 unsigned char res21[0x4];
291 unsigned int src_lcd;
292 unsigned int src_isp;
293 unsigned int src_maudio;
294 unsigned int src_fsys;
295 unsigned char res22[0xc];
296 unsigned int src_peril0;
297 unsigned int src_peril1;
298 unsigned int src_cam1;
299 unsigned char res23[0xb4];
300 unsigned int src_mask_top;
301 unsigned char res24[0xc];
302 unsigned int src_mask_cam;
303 unsigned int src_mask_tv;
304 unsigned char res25[0xc];
305 unsigned int src_mask_lcd;
306 unsigned int src_mask_isp;
307 unsigned int src_mask_maudio;
308 unsigned int src_mask_fsys;
309 unsigned char res26[0xc];
310 unsigned int src_mask_peril0;
311 unsigned int src_mask_peril1;
312 unsigned char res27[0xb8];
313 unsigned int mux_stat_top0;
314 unsigned int mux_stat_top1;
315 unsigned char res28[0x10];
316 unsigned int mux_stat_mfc;
317 unsigned int mux_stat_g3d;
318 unsigned char res29[0x28];
319 unsigned int mux_stat_cam1;
320 unsigned char res30[0xb4];
321 unsigned int div_top;
322 unsigned char res31[0xc];
323 unsigned int div_cam;
324 unsigned int div_tv;
325 unsigned int div_mfc;
326 unsigned int div_g3d;
327 unsigned char res32[0x4];
328 unsigned int div_lcd;
329 unsigned int div_isp;
330 unsigned int div_maudio;
331 unsigned int div_fsys0;
332 unsigned int div_fsys1;
333 unsigned int div_fsys2;
334 unsigned int div_fsys3;
335 unsigned int div_peril0;
336 unsigned int div_peril1;
337 unsigned int div_peril2;
338 unsigned int div_peril3;
339 unsigned int div_peril4;
340 unsigned int div_peril5;
341 unsigned int div_cam1;
342 unsigned char res33[0x14];
343 unsigned int div2_ratio;
344 unsigned char res34[0x8c];
345 unsigned int div_stat_top;
346 unsigned char res35[0xc];
347 unsigned int div_stat_cam;
348 unsigned int div_stat_tv;
349 unsigned int div_stat_mfc;
350 unsigned int div_stat_g3d;
351 unsigned char res36[0x4];
352 unsigned int div_stat_lcd;
353 unsigned int div_stat_isp;
354 unsigned int div_stat_maudio;
355 unsigned int div_stat_fsys0;
356 unsigned int div_stat_fsys1;
357 unsigned int div_stat_fsys2;
358 unsigned int div_stat_fsys3;
359 unsigned int div_stat_peril0;
360 unsigned int div_stat_peril1;
361 unsigned int div_stat_peril2;
362 unsigned int div_stat_peril3;
363 unsigned int div_stat_peril4;
364 unsigned int div_stat_peril5;
365 unsigned int div_stat_cam1;
366 unsigned char res37[0x14];
367 unsigned int div2_stat;
368 unsigned char res38[0x29c];
369 unsigned int gate_ip_cam;
370 unsigned int gate_ip_tv;
371 unsigned int gate_ip_mfc;
372 unsigned int gate_ip_g3d;
373 unsigned char res39[0x4];
374 unsigned int gate_ip_lcd;
375 unsigned int gate_ip_isp;
376 unsigned char res40[0x4];
377 unsigned int gate_ip_fsys;
378 unsigned char res41[0x8];
379 unsigned int gate_ip_gps;
380 unsigned int gate_ip_peril;
381 unsigned char res42[0xc];
382 unsigned char res43[0x4];
383 unsigned char res44[0xc];
384 unsigned int gate_block;
385 unsigned char res45[0x8c];
386 unsigned int clkout_cmu_top;
387 unsigned int clkout_cmu_top_div_stat;
388 unsigned char res46[0x3600];
389 unsigned int mpll_lock;
390 unsigned char res47[0xfc];
391 unsigned int mpll_con0;
392 unsigned int mpll_con1;
393 unsigned char res48[0xf0];
394 unsigned int src_dmc;
395 unsigned char res49[0xfc];
396 unsigned int src_mask_dmc;
397 unsigned char res50[0xfc];
398 unsigned int mux_stat_dmc;
399 unsigned char res51[0xfc];
400 unsigned int div_dmc0;
401 unsigned int div_dmc1;
402 unsigned char res52[0xf8];
403 unsigned int div_stat_dmc0;
404 unsigned int div_stat_dmc1;
405 unsigned char res53[0xf8];
406 unsigned int gate_bus_dmc0;
407 unsigned int gate_bus_dmc1;
408 unsigned char res54[0x1f8];
409 unsigned int gate_ip_dmc0;
410 unsigned int gate_ip_dmc1;
411 unsigned char res55[0xf8];
412 unsigned int clkout_cmu_dmc;
413 unsigned int clkout_cmu_dmc_div_stat;
414 unsigned char res56[0x5f8];
415 unsigned int dcgidx_map0;
416 unsigned int dcgidx_map1;
417 unsigned int dcgidx_map2;
418 unsigned char res57[0x14];
419 unsigned int dcgperf_map0;
420 unsigned int dcgperf_map1;
421 unsigned char res58[0x18];
422 unsigned int dvcidx_map;
423 unsigned char res59[0x1c];
424 unsigned int freq_cpu;
425 unsigned int freq_dpm;
426 unsigned char res60[0x18];
427 unsigned int dvsemclk_en;
428 unsigned int maxperf;
429 unsigned char res61[0x8];
430 unsigned int dmc_freq_ctrl;
431 unsigned int dmc_pause_ctrl;
432 unsigned int dddrphy_lock_ctrl;
433 unsigned int c2c_state;
434 unsigned char res62[0x2f60];
435 unsigned int apll_lock;
436 unsigned char res63[0x8];
437 unsigned char res64[0xf4];
438 unsigned int apll_con0;
439 unsigned int apll_con1;
440 unsigned char res65[0xf8];
441 unsigned int src_cpu;
442 unsigned char res66[0x1fc];
443 unsigned int mux_stat_cpu;
444 unsigned char res67[0xfc];
445 unsigned int div_cpu0;
446 unsigned int div_cpu1;
447 unsigned char res68[0xf8];
448 unsigned int div_stat_cpu0;
449 unsigned int div_stat_cpu1;
450 unsigned char res69[0x2f8];
451 unsigned int clk_gate_ip_cpu;
452 unsigned char res70[0xfc];
453 unsigned int clkout_cmu_cpu;
454 unsigned int clkout_cmu_cpu_div_stat;
455 unsigned char res71[0x5f8];
456 unsigned int armclk_stopctrl;
457 unsigned int atclk_stopctrl;
458 unsigned char res72[0x10];
459 unsigned char res73[0x8];
460 unsigned int pwr_ctrl;
461 unsigned int pwr_ctrl2;
462 unsigned char res74[0xd8];
463 unsigned int apll_con0_l8;
464 unsigned int apll_con0_l7;
465 unsigned int apll_con0_l6;
466 unsigned int apll_con0_l5;
467 unsigned int apll_con0_l4;
468 unsigned int apll_con0_l3;
469 unsigned int apll_con0_l2;
470 unsigned int apll_con0_l1;
471 unsigned int iem_control;
472 unsigned char res75[0xdc];
473 unsigned int apll_con1_l8;
474 unsigned int apll_con1_l7;
475 unsigned int apll_con1_l6;
476 unsigned int apll_con1_l5;
477 unsigned int apll_con1_l4;
478 unsigned int apll_con1_l3;
479 unsigned int apll_con1_l2;
480 unsigned int apll_con1_l1;
481 unsigned char res76[0xe0];
482 unsigned int div_iem_l8;
483 unsigned int div_iem_l7;
484 unsigned int div_iem_l6;
485 unsigned int div_iem_l5;
486 unsigned int div_iem_l4;
487 unsigned int div_iem_l3;
488 unsigned int div_iem_l2;
489 unsigned int div_iem_l1;
490 unsigned char res77[0xe0];
491 unsigned int l2_status;
492 unsigned char res78[0xc];
493 unsigned int cpu_status;
494 unsigned char res79[0xc];
495 unsigned int ptm_status;
496 unsigned char res80[0x2edc];
497 unsigned int div_isp0;
498 unsigned int div_isp1;
499 unsigned char res81[0xf8];
500 unsigned int div_stat_isp0;
501 unsigned int div_stat_isp1;
502 unsigned char res82[0x3f8];
503 unsigned int gate_ip_isp0;
504 unsigned int gate_ip_isp1;
505 unsigned char res83[0x1f8];
506 unsigned int clkout_cmu_isp;
507 unsigned int clkout_cmu_ispd_div_stat;
508 unsigned char res84[0xf8];
509 unsigned int cmu_isp_spar0;
510 unsigned int cmu_isp_spar1;
511 unsigned int cmu_isp_spar2;
512 unsigned int cmu_isp_spar3;