Lines Matching refs:clk
549 struct exynos5_clock *clk = in exynos5250_system_clock_init() local
558 clrbits_le32(&clk->src_cpu, MUX_APLL_SEL_MASK); in exynos5250_system_clock_init()
560 val = readl(&clk->mux_stat_cpu); in exynos5250_system_clock_init()
563 clrbits_le32(&clk->src_core1, MUX_MPLL_SEL_MASK); in exynos5250_system_clock_init()
565 val = readl(&clk->mux_stat_core1); in exynos5250_system_clock_init()
568 clrbits_le32(&clk->src_top2, MUX_CPLL_SEL_MASK); in exynos5250_system_clock_init()
569 clrbits_le32(&clk->src_top2, MUX_EPLL_SEL_MASK); in exynos5250_system_clock_init()
570 clrbits_le32(&clk->src_top2, MUX_VPLL_SEL_MASK); in exynos5250_system_clock_init()
571 clrbits_le32(&clk->src_top2, MUX_GPLL_SEL_MASK); in exynos5250_system_clock_init()
575 val = readl(&clk->mux_stat_top2); in exynos5250_system_clock_init()
578 clrbits_le32(&clk->src_cdrex, MUX_BPLL_SEL_MASK); in exynos5250_system_clock_init()
580 val = readl(&clk->mux_stat_cdrex); in exynos5250_system_clock_init()
584 writel(mem->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5250_system_clock_init()
585 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5250_system_clock_init()
586 writel(mem->bpll_pdiv * PLL_LOCK_FACTOR, &clk->bpll_lock); in exynos5250_system_clock_init()
587 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5250_system_clock_init()
588 writel(mem->gpll_pdiv * PLL_X_LOCK_FACTOR, &clk->gpll_lock); in exynos5250_system_clock_init()
589 writel(mem->epll_pdiv * PLL_X_LOCK_FACTOR, &clk->epll_lock); in exynos5250_system_clock_init()
590 writel(mem->vpll_pdiv * PLL_X_LOCK_FACTOR, &clk->vpll_lock); in exynos5250_system_clock_init()
592 writel(CLK_REG_DISABLE, &clk->pll_div2_sel); in exynos5250_system_clock_init()
594 writel(MUX_HPM_SEL_MASK, &clk->src_cpu); in exynos5250_system_clock_init()
596 val = readl(&clk->mux_stat_cpu); in exynos5250_system_clock_init()
607 writel(val, &clk->div_cpu0); in exynos5250_system_clock_init()
609 val = readl(&clk->div_stat_cpu0); in exynos5250_system_clock_init()
612 writel(CLK_DIV_CPU1_VAL, &clk->div_cpu1); in exynos5250_system_clock_init()
614 val = readl(&clk->div_stat_cpu1); in exynos5250_system_clock_init()
618 writel(APLL_CON1_VAL, &clk->apll_con1); in exynos5250_system_clock_init()
621 writel(val, &clk->apll_con0); in exynos5250_system_clock_init()
622 while ((readl(&clk->apll_con0) & APLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
626 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5250_system_clock_init()
628 writel(val, &clk->mpll_con0); in exynos5250_system_clock_init()
629 while ((readl(&clk->mpll_con0) & MPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
633 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5250_system_clock_init()
635 writel(val, &clk->bpll_con0); in exynos5250_system_clock_init()
636 while ((readl(&clk->bpll_con0) & BPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
640 writel(CPLL_CON1_VAL, &clk->cpll_con1); in exynos5250_system_clock_init()
642 writel(val, &clk->cpll_con0); in exynos5250_system_clock_init()
643 while ((readl(&clk->cpll_con0) & CPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
647 writel(GPLL_CON1_VAL, &clk->gpll_con1); in exynos5250_system_clock_init()
649 writel(val, &clk->gpll_con0); in exynos5250_system_clock_init()
650 while ((readl(&clk->gpll_con0) & GPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
654 writel(EPLL_CON2_VAL, &clk->epll_con2); in exynos5250_system_clock_init()
655 writel(EPLL_CON1_VAL, &clk->epll_con1); in exynos5250_system_clock_init()
657 writel(val, &clk->epll_con0); in exynos5250_system_clock_init()
658 while ((readl(&clk->epll_con0) & EPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
662 writel(VPLL_CON2_VAL, &clk->vpll_con2); in exynos5250_system_clock_init()
663 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5250_system_clock_init()
665 writel(val, &clk->vpll_con0); in exynos5250_system_clock_init()
666 while ((readl(&clk->vpll_con0) & VPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
669 writel(CLK_SRC_CORE0_VAL, &clk->src_core0); in exynos5250_system_clock_init()
670 writel(CLK_DIV_CORE0_VAL, &clk->div_core0); in exynos5250_system_clock_init()
671 while (readl(&clk->div_stat_core0) != 0) in exynos5250_system_clock_init()
674 writel(CLK_DIV_CORE1_VAL, &clk->div_core1); in exynos5250_system_clock_init()
675 while (readl(&clk->div_stat_core1) != 0) in exynos5250_system_clock_init()
678 writel(CLK_DIV_SYSRGT_VAL, &clk->div_sysrgt); in exynos5250_system_clock_init()
679 while (readl(&clk->div_stat_sysrgt) != 0) in exynos5250_system_clock_init()
682 writel(CLK_DIV_ACP_VAL, &clk->div_acp); in exynos5250_system_clock_init()
683 while (readl(&clk->div_stat_acp) != 0) in exynos5250_system_clock_init()
686 writel(CLK_DIV_SYSLFT_VAL, &clk->div_syslft); in exynos5250_system_clock_init()
687 while (readl(&clk->div_stat_syslft) != 0) in exynos5250_system_clock_init()
690 writel(CLK_SRC_TOP0_VAL, &clk->src_top0); in exynos5250_system_clock_init()
691 writel(CLK_SRC_TOP1_VAL, &clk->src_top1); in exynos5250_system_clock_init()
692 writel(TOP2_VAL, &clk->src_top2); in exynos5250_system_clock_init()
693 writel(CLK_SRC_TOP3_VAL, &clk->src_top3); in exynos5250_system_clock_init()
695 writel(CLK_DIV_TOP0_VAL, &clk->div_top0); in exynos5250_system_clock_init()
696 while (readl(&clk->div_stat_top0)) in exynos5250_system_clock_init()
699 writel(CLK_DIV_TOP1_VAL, &clk->div_top1); in exynos5250_system_clock_init()
700 while (readl(&clk->div_stat_top1)) in exynos5250_system_clock_init()
703 writel(CLK_SRC_LEX_VAL, &clk->src_lex); in exynos5250_system_clock_init()
705 val = readl(&clk->mux_stat_lex); in exynos5250_system_clock_init()
710 writel(CLK_DIV_LEX_VAL, &clk->div_lex); in exynos5250_system_clock_init()
711 while (readl(&clk->div_stat_lex)) in exynos5250_system_clock_init()
714 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()
715 while (readl(&clk->div_stat_r0x)) in exynos5250_system_clock_init()
718 writel(CLK_DIV_R0X_VAL, &clk->div_r0x); in exynos5250_system_clock_init()
719 while (readl(&clk->div_stat_r0x)) in exynos5250_system_clock_init()
722 writel(CLK_DIV_R1X_VAL, &clk->div_r1x); in exynos5250_system_clock_init()
723 while (readl(&clk->div_stat_r1x)) in exynos5250_system_clock_init()
726 writel(CLK_REG_DISABLE, &clk->src_cdrex); in exynos5250_system_clock_init()
728 writel(CLK_DIV_CDREX_VAL, &clk->div_cdrex); in exynos5250_system_clock_init()
729 while (readl(&clk->div_stat_cdrex)) in exynos5250_system_clock_init()
732 val = readl(&clk->src_cpu); in exynos5250_system_clock_init()
734 writel(val, &clk->src_cpu); in exynos5250_system_clock_init()
736 val = readl(&clk->src_top2); in exynos5250_system_clock_init()
738 writel(val, &clk->src_top2); in exynos5250_system_clock_init()
740 val = readl(&clk->src_core1); in exynos5250_system_clock_init()
742 writel(val, &clk->src_core1); in exynos5250_system_clock_init()
744 writel(CLK_SRC_FSYS0_VAL, &clk->src_fsys); in exynos5250_system_clock_init()
745 writel(CLK_DIV_FSYS0_VAL, &clk->div_fsys0); in exynos5250_system_clock_init()
746 while (readl(&clk->div_stat_fsys0)) in exynos5250_system_clock_init()
749 writel(CLK_REG_DISABLE, &clk->clkout_cmu_cpu); in exynos5250_system_clock_init()
750 writel(CLK_REG_DISABLE, &clk->clkout_cmu_core); in exynos5250_system_clock_init()
751 writel(CLK_REG_DISABLE, &clk->clkout_cmu_acp); in exynos5250_system_clock_init()
752 writel(CLK_REG_DISABLE, &clk->clkout_cmu_top); in exynos5250_system_clock_init()
753 writel(CLK_REG_DISABLE, &clk->clkout_cmu_lex); in exynos5250_system_clock_init()
754 writel(CLK_REG_DISABLE, &clk->clkout_cmu_r0x); in exynos5250_system_clock_init()
755 writel(CLK_REG_DISABLE, &clk->clkout_cmu_r1x); in exynos5250_system_clock_init()
756 writel(CLK_REG_DISABLE, &clk->clkout_cmu_cdrex); in exynos5250_system_clock_init()
758 writel(CLK_SRC_PERIC0_VAL, &clk->src_peric0); in exynos5250_system_clock_init()
759 writel(CLK_DIV_PERIC0_VAL, &clk->div_peric0); in exynos5250_system_clock_init()
761 writel(CLK_SRC_PERIC1_VAL, &clk->src_peric1); in exynos5250_system_clock_init()
762 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1); in exynos5250_system_clock_init()
763 writel(CLK_DIV_PERIC2_VAL, &clk->div_peric2); in exynos5250_system_clock_init()
764 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3); in exynos5250_system_clock_init()
766 writel(SCLK_SRC_ISP_VAL, &clk->sclk_src_isp); in exynos5250_system_clock_init()
767 writel(SCLK_DIV_ISP_VAL, &clk->sclk_div_isp); in exynos5250_system_clock_init()
768 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5250_system_clock_init()
769 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5250_system_clock_init()
770 writel(CLK_DIV_ISP2_VAL, &clk->div_isp2); in exynos5250_system_clock_init()
773 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp1_0); in exynos5250_system_clock_init()
779 writel(val, &clk->div_fsys2); in exynos5250_system_clock_init()
784 struct exynos5420_clock *clk = in exynos5420_system_clock_init() local
794 writel(arm_clk_ratio->apll_pdiv * PLL_LOCK_FACTOR, &clk->apll_lock); in exynos5420_system_clock_init()
795 writel(mem->mpll_pdiv * PLL_LOCK_FACTOR, &clk->mpll_lock); in exynos5420_system_clock_init()
796 writel(mem->bpll_pdiv * PLL_LOCK_FACTOR, &clk->bpll_lock); in exynos5420_system_clock_init()
797 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5420_system_clock_init()
798 writel(mem->dpll_pdiv * PLL_LOCK_FACTOR, &clk->dpll_lock); in exynos5420_system_clock_init()
799 writel(mem->epll_pdiv * PLL_X_LOCK_FACTOR, &clk->epll_lock); in exynos5420_system_clock_init()
800 writel(mem->vpll_pdiv * PLL_LOCK_FACTOR, &clk->vpll_lock); in exynos5420_system_clock_init()
801 writel(mem->ipll_pdiv * PLL_LOCK_FACTOR, &clk->ipll_lock); in exynos5420_system_clock_init()
802 writel(mem->spll_pdiv * PLL_LOCK_FACTOR, &clk->spll_lock); in exynos5420_system_clock_init()
803 writel(mem->kpll_pdiv * PLL_LOCK_FACTOR, &clk->kpll_lock); in exynos5420_system_clock_init()
804 writel(mem->rpll_pdiv * PLL_X_LOCK_FACTOR, &clk->rpll_lock); in exynos5420_system_clock_init()
806 setbits_le32(&clk->src_cpu, MUX_HPM_SEL_MASK); in exynos5420_system_clock_init()
808 writel(0, &clk->src_top6); in exynos5420_system_clock_init()
810 writel(0, &clk->src_cdrex); in exynos5420_system_clock_init()
811 writel(SRC_KFC_HPM_SEL, &clk->src_kfc); in exynos5420_system_clock_init()
812 writel(HPM_RATIO, &clk->div_cpu1); in exynos5420_system_clock_init()
813 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in exynos5420_system_clock_init()
816 clrbits_le32(&clk->src_cpu, APLL_FOUT); in exynos5420_system_clock_init()
819 writel(APLL_CON1_VAL, &clk->apll_con1); in exynos5420_system_clock_init()
823 writel(val, &clk->apll_con0); in exynos5420_system_clock_init()
824 while ((readl(&clk->apll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
828 setbits_le32(&clk->src_cpu, APLL_FOUT); in exynos5420_system_clock_init()
830 writel(SRC_KFC_HPM_SEL, &clk->src_kfc); in exynos5420_system_clock_init()
831 writel(CLK_DIV_KFC_VAL, &clk->div_kfc0); in exynos5420_system_clock_init()
834 clrbits_le32(&clk->src_kfc, KPLL_FOUT); in exynos5420_system_clock_init()
837 writel(KPLL_CON1_VAL, &clk->kpll_con1); in exynos5420_system_clock_init()
839 writel(val, &clk->kpll_con0); in exynos5420_system_clock_init()
840 while ((readl(&clk->kpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
844 setbits_le32(&clk->src_kfc, KPLL_FOUT); in exynos5420_system_clock_init()
847 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5420_system_clock_init()
849 writel(val, &clk->mpll_con0); in exynos5420_system_clock_init()
850 while ((readl(&clk->mpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
854 writel(DPLL_CON1_VAL, &clk->dpll_con1); in exynos5420_system_clock_init()
856 writel(val, &clk->dpll_con0); in exynos5420_system_clock_init()
857 while ((readl(&clk->dpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
861 writel(EPLL_CON2_VAL, &clk->epll_con2); in exynos5420_system_clock_init()
862 writel(EPLL_CON1_VAL, &clk->epll_con1); in exynos5420_system_clock_init()
864 writel(val, &clk->epll_con0); in exynos5420_system_clock_init()
865 while ((readl(&clk->epll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
869 writel(CPLL_CON1_VAL, &clk->cpll_con1); in exynos5420_system_clock_init()
871 writel(val, &clk->cpll_con0); in exynos5420_system_clock_init()
872 while ((readl(&clk->cpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
876 writel(IPLL_CON1_VAL, &clk->ipll_con1); in exynos5420_system_clock_init()
878 writel(val, &clk->ipll_con0); in exynos5420_system_clock_init()
879 while ((readl(&clk->ipll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
883 writel(VPLL_CON1_VAL, &clk->vpll_con1); in exynos5420_system_clock_init()
885 writel(val, &clk->vpll_con0); in exynos5420_system_clock_init()
886 while ((readl(&clk->vpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
890 writel(BPLL_CON1_VAL, &clk->bpll_con1); in exynos5420_system_clock_init()
892 writel(val, &clk->bpll_con0); in exynos5420_system_clock_init()
893 while ((readl(&clk->bpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
897 writel(SPLL_CON1_VAL, &clk->spll_con1); in exynos5420_system_clock_init()
899 writel(val, &clk->spll_con0); in exynos5420_system_clock_init()
900 while ((readl(&clk->spll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
904 writel(RPLL_CON2_VAL, &clk->rpll_con2); in exynos5420_system_clock_init()
905 writel(RPLL_CON1_VAL, &clk->rpll_con1); in exynos5420_system_clock_init()
907 writel(val, &clk->rpll_con0); in exynos5420_system_clock_init()
908 while ((readl(&clk->rpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
911 writel(CLK_DIV_CDREX0_VAL, &clk->div_cdrex0); in exynos5420_system_clock_init()
912 writel(CLK_DIV_CDREX1_VAL, &clk->div_cdrex1); in exynos5420_system_clock_init()
914 writel(CLK_SRC_TOP0_VAL, &clk->src_top0); in exynos5420_system_clock_init()
915 writel(CLK_SRC_TOP1_VAL, &clk->src_top1); in exynos5420_system_clock_init()
916 writel(CLK_SRC_TOP2_VAL, &clk->src_top2); in exynos5420_system_clock_init()
917 writel(CLK_SRC_TOP7_VAL, &clk->src_top7); in exynos5420_system_clock_init()
919 writel(CLK_DIV_TOP0_VAL, &clk->div_top0); in exynos5420_system_clock_init()
920 writel(CLK_DIV_TOP1_VAL, &clk->div_top1); in exynos5420_system_clock_init()
921 writel(CLK_DIV_TOP2_VAL, &clk->div_top2); in exynos5420_system_clock_init()
923 writel(0, &clk->src_top10); in exynos5420_system_clock_init()
924 writel(0, &clk->src_top11); in exynos5420_system_clock_init()
925 writel(0, &clk->src_top12); in exynos5420_system_clock_init()
927 writel(CLK_SRC_TOP3_VAL, &clk->src_top3); in exynos5420_system_clock_init()
928 writel(CLK_SRC_TOP4_VAL, &clk->src_top4); in exynos5420_system_clock_init()
929 writel(CLK_SRC_TOP5_VAL, &clk->src_top5); in exynos5420_system_clock_init()
932 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp10); in exynos5420_system_clock_init()
933 writel(CLK_DIV_DISP1_0_VAL, &clk->div_disp10); in exynos5420_system_clock_init()
936 writel(AUDIO0_SEL_EPLL, &clk->src_mau); in exynos5420_system_clock_init()
937 writel(DIV_MAU_VAL, &clk->div_mau); in exynos5420_system_clock_init()
940 writel(CLK_SRC_FSYS0_VAL, &clk->src_fsys); in exynos5420_system_clock_init()
941 writel(CLK_DIV_FSYS0_VAL, &clk->div_fsys0); in exynos5420_system_clock_init()
942 writel(CLK_DIV_FSYS1_VAL, &clk->div_fsys1); in exynos5420_system_clock_init()
943 writel(CLK_DIV_FSYS2_VAL, &clk->div_fsys2); in exynos5420_system_clock_init()
945 writel(CLK_SRC_ISP_VAL, &clk->src_isp); in exynos5420_system_clock_init()
946 writel(CLK_DIV_ISP0_VAL, &clk->div_isp0); in exynos5420_system_clock_init()
947 writel(CLK_DIV_ISP1_VAL, &clk->div_isp1); in exynos5420_system_clock_init()
949 writel(CLK_SRC_PERIC0_VAL, &clk->src_peric0); in exynos5420_system_clock_init()
950 writel(CLK_SRC_PERIC1_VAL, &clk->src_peric1); in exynos5420_system_clock_init()
952 writel(CLK_DIV_PERIC0_VAL, &clk->div_peric0); in exynos5420_system_clock_init()
953 writel(CLK_DIV_PERIC1_VAL, &clk->div_peric1); in exynos5420_system_clock_init()
954 writel(CLK_DIV_PERIC2_VAL, &clk->div_peric2); in exynos5420_system_clock_init()
955 writel(CLK_DIV_PERIC3_VAL, &clk->div_peric3); in exynos5420_system_clock_init()
956 writel(CLK_DIV_PERIC4_VAL, &clk->div_peric4); in exynos5420_system_clock_init()
958 writel(CLK_DIV_CPERI1_VAL, &clk->div_cperi1); in exynos5420_system_clock_init()
960 writel(CLK_DIV2_RATIO, &clk->clkdiv2_ratio); in exynos5420_system_clock_init()
961 writel(CLK_DIV4_RATIO, &clk->clkdiv4_ratio); in exynos5420_system_clock_init()
962 writel(CLK_DIV_G2D, &clk->div_g2d); in exynos5420_system_clock_init()
964 writel(CLK_SRC_TOP6_VAL, &clk->src_top6); in exynos5420_system_clock_init()
965 writel(CLK_SRC_CDREX_VAL, &clk->src_cdrex); in exynos5420_system_clock_init()
966 writel(CLK_SRC_KFC_VAL, &clk->src_kfc); in exynos5420_system_clock_init()
979 struct exynos5_clock *clk = in clock_init_dp_clock() local
983 setbits_le32(&clk->gate_ip_disp1, CLK_GATE_DP1_ALLOW); in clock_init_dp_clock()
986 setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1); in clock_init_dp_clock()
995 struct exynos5_clock *clk = in emmc_boot_clk_div_set() local
999 div_mmc = readl((unsigned int) &clk->div_fsys1) & ~FSYS1_MMC0_DIV_MASK; in emmc_boot_clk_div_set()
1001 writel(div_mmc, (unsigned int) &clk->div_fsys1); in emmc_boot_clk_div_set()