Lines Matching refs:MPLL
125 if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL || in exynos_get_pll_clk()
195 case MPLL: in exynos4_get_pll_clk()
225 case MPLL: in exynos4x12_get_pll_clk()
256 case MPLL: in exynos5_get_pll_clk()
279 if (pllreg == MPLL || pllreg == BPLL) { in exynos5_get_pll_clk()
283 case MPLL: in exynos5_get_pll_clk()
314 case MPLL: in exynos542x_get_pll_clk()
437 sclk = exynos5_get_pll_clk(MPLL); in exynos5_get_periph_rate()
528 sclk = exynos542x_get_pll_clk(MPLL); in exynos542x_get_periph_rate()
652 sclk = get_pll_clk(MPLL); in exynos4_get_pwm_clk()
667 sclk = get_pll_clk(MPLL); in exynos4_get_pwm_clk()
683 sclk = get_pll_clk(MPLL); in exynos4x12_get_pwm_clk()
713 sclk = get_pll_clk(MPLL); in exynos4_get_uart_clk()
759 sclk = get_pll_clk(MPLL); in exynos4x12_get_uart_clk()
795 sclk = get_pll_clk(MPLL); in exynos4_get_mmc_clk()
933 sclk = get_pll_clk(MPLL); in exynos4_get_lcd_clk()
975 sclk = get_pll_clk(MPLL); in exynos5_get_lcd_clk()
1049 const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL, in exynos5800_get_lcd_clk()